/srv/pokybuild/yocto-worker/reproducible/build/build-st/tmp/work/x86_64-linux/diffoscope-native/208-r0/recipe-sysroot-native/usr/bin/diffoscope.real --no-default-limits --max-report-size 262144000 --exclude-directory-metadata yes --html-dir /srv/autobuilder/valkyrie.yocto.io/pub/repro-fail/oe-reproducible-20250219-aucltpnr/packages/diff-html reproducibleA reproducibleB

600

static·inline·void·_nocheck__trace_pci_nvme_irq_msix(uint32_t·vector)

600

static·inline·void·_nocheck__trace_pci_nvme_irq_msix(uint32_t·vector)

601

{

601

{

602

····if·(trace_event_get_state(TRACE_PCI_NVME_IRQ_MSIX)·&&·qemu_loglevel_mask(LOG_TRACE))·{

602

····if·(trace_event_get_state(TRACE_PCI_NVME_IRQ_MSIX)·&&·qemu_loglevel_mask(LOG_TRACE))·{

603

········if·(message_with_timestamp)·{

603

········if·(message_with_timestamp)·{

604

············struct·timeval·_now;

604

············struct·timeval·_now;

605

············gettimeofday(&_now,·NULL);

605

············gettimeofday(&_now,·NULL);

607

············qemu_log("%d@%zu.%06zu:pci_nvme_irq_msix·"·"raising·MSI-X·IRQ·vector·%u"·"\n",

607

············qemu_log("%d@%zu.%06zu:pci_nvme_irq_msix·"·"raising·MSI-X·IRQ·vector·%u"·"\n",

608

·····················qemu_get_thread_id(),

608

·····················qemu_get_thread_id(),

609

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

609

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

610

·····················,·vector);

610

·····················,·vector);

611

#line·613·"trace/trace-hw_nvme.h"

611

#line·613·"trace/trace-hw_nvme.h"

612

········}·else·{

612

········}·else·{

614

············qemu_log("pci_nvme_irq_msix·"·"raising·MSI-X·IRQ·vector·%u"·"\n",·vector);

614

············qemu_log("pci_nvme_irq_msix·"·"raising·MSI-X·IRQ·vector·%u"·"\n",·vector);

615

#line·617·"trace/trace-hw_nvme.h"

615

#line·617·"trace/trace-hw_nvme.h"

616

········}

616

········}

617

····}

617

····}

618

}

618

}

619

static·inline·void·trace_pci_nvme_irq_msix(uint32_t·vector)

619

static·inline·void·trace_pci_nvme_irq_msix(uint32_t·vector)

631

static·inline·void·_nocheck__trace_pci_nvme_irq_pin(void)

631

static·inline·void·_nocheck__trace_pci_nvme_irq_pin(void)

632

{

632

{

633

····if·(trace_event_get_state(TRACE_PCI_NVME_IRQ_PIN)·&&·qemu_loglevel_mask(LOG_TRACE))·{

633

····if·(trace_event_get_state(TRACE_PCI_NVME_IRQ_PIN)·&&·qemu_loglevel_mask(LOG_TRACE))·{

634

········if·(message_with_timestamp)·{

634

········if·(message_with_timestamp)·{

635

············struct·timeval·_now;

635

············struct·timeval·_now;

636

············gettimeofday(&_now,·NULL);

636

············gettimeofday(&_now,·NULL);

638

············qemu_log("%d@%zu.%06zu:pci_nvme_irq_pin·"·"pulsing·IRQ·pin"·"\n",

638

············qemu_log("%d@%zu.%06zu:pci_nvme_irq_pin·"·"pulsing·IRQ·pin"·"\n",

639

·····················qemu_get_thread_id(),

639

·····················qemu_get_thread_id(),

640

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

640

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

641

·····················);

641

·····················);

642

#line·644·"trace/trace-hw_nvme.h"

642

#line·644·"trace/trace-hw_nvme.h"

643

········}·else·{

643

········}·else·{

645

············qemu_log("pci_nvme_irq_pin·"·"pulsing·IRQ·pin"·"\n");

645

············qemu_log("pci_nvme_irq_pin·"·"pulsing·IRQ·pin"·"\n");

646

#line·648·"trace/trace-hw_nvme.h"

646

#line·648·"trace/trace-hw_nvme.h"

647

········}

647

········}

648

····}

648

····}

649

}

649

}

650

static·inline·void·trace_pci_nvme_irq_pin(void)

650

static·inline·void·trace_pci_nvme_irq_pin(void)

662

static·inline·void·_nocheck__trace_pci_nvme_irq_masked(void)

662

static·inline·void·_nocheck__trace_pci_nvme_irq_masked(void)

663

{

663

{

664

····if·(trace_event_get_state(TRACE_PCI_NVME_IRQ_MASKED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

664

····if·(trace_event_get_state(TRACE_PCI_NVME_IRQ_MASKED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

665

········if·(message_with_timestamp)·{

665

········if·(message_with_timestamp)·{

666

············struct·timeval·_now;

666

············struct·timeval·_now;

667

············gettimeofday(&_now,·NULL);

667

············gettimeofday(&_now,·NULL);

669

············qemu_log("%d@%zu.%06zu:pci_nvme_irq_masked·"·"IRQ·is·masked"·"\n",

669

············qemu_log("%d@%zu.%06zu:pci_nvme_irq_masked·"·"IRQ·is·masked"·"\n",

670

·····················qemu_get_thread_id(),

670

·····················qemu_get_thread_id(),

671

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

671

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

672

·····················);

672

·····················);

673

#line·675·"trace/trace-hw_nvme.h"

673

#line·675·"trace/trace-hw_nvme.h"

674

········}·else·{

674

········}·else·{

676

············qemu_log("pci_nvme_irq_masked·"·"IRQ·is·masked"·"\n");

676

············qemu_log("pci_nvme_irq_masked·"·"IRQ·is·masked"·"\n");

677

#line·679·"trace/trace-hw_nvme.h"

677

#line·679·"trace/trace-hw_nvme.h"

678

········}

678

········}

679

····}

679

····}

680

}

680

}

681

static·inline·void·trace_pci_nvme_irq_masked(void)

681

static·inline·void·trace_pci_nvme_irq_masked(void)

693

static·inline·void·_nocheck__trace_pci_nvme_dma_read(uint64_t·prp1,·uint64_t·prp2)

693

static·inline·void·_nocheck__trace_pci_nvme_dma_read(uint64_t·prp1,·uint64_t·prp2)

694

{

694

{

695

····if·(trace_event_get_state(TRACE_PCI_NVME_DMA_READ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

695

····if·(trace_event_get_state(TRACE_PCI_NVME_DMA_READ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

696

········if·(message_with_timestamp)·{

696

········if·(message_with_timestamp)·{

697

············struct·timeval·_now;

697

············struct·timeval·_now;

698

············gettimeofday(&_now,·NULL);

698

············gettimeofday(&_now,·NULL);

700

············qemu_log("%d@%zu.%06zu:pci_nvme_dma_read·"·"DMA·read,·prp1=0x%"PRIx64"·prp2=0x%"PRIx64""·"\n",

700

············qemu_log("%d@%zu.%06zu:pci_nvme_dma_read·"·"DMA·read,·prp1=0x%"PRIx64"·prp2=0x%"PRIx64""·"\n",

701

·····················qemu_get_thread_id(),

701

·····················qemu_get_thread_id(),

702

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

702

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

703

·····················,·prp1,·prp2);

703

·····················,·prp1,·prp2);

704

#line·706·"trace/trace-hw_nvme.h"

704

#line·706·"trace/trace-hw_nvme.h"

705

········}·else·{

705

········}·else·{

707

············qemu_log("pci_nvme_dma_read·"·"DMA·read,·prp1=0x%"PRIx64"·prp2=0x%"PRIx64""·"\n",·prp1,·prp2);

707

············qemu_log("pci_nvme_dma_read·"·"DMA·read,·prp1=0x%"PRIx64"·prp2=0x%"PRIx64""·"\n",·prp1,·prp2);

708

#line·710·"trace/trace-hw_nvme.h"

708

#line·710·"trace/trace-hw_nvme.h"

709

········}

709

········}

710

····}

710

····}

711

}

711

}

712

static·inline·void·trace_pci_nvme_dma_read(uint64_t·prp1,·uint64_t·prp2)

712

static·inline·void·trace_pci_nvme_dma_read(uint64_t·prp1,·uint64_t·prp2)

724

static·inline·void·_nocheck__trace_pci_nvme_map_addr(uint64_t·addr,·uint64_t·len)

724

static·inline·void·_nocheck__trace_pci_nvme_map_addr(uint64_t·addr,·uint64_t·len)

725

{

725

{

726

····if·(trace_event_get_state(TRACE_PCI_NVME_MAP_ADDR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

726

····if·(trace_event_get_state(TRACE_PCI_NVME_MAP_ADDR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

727

········if·(message_with_timestamp)·{

727

········if·(message_with_timestamp)·{

728

············struct·timeval·_now;

728

············struct·timeval·_now;

729

············gettimeofday(&_now,·NULL);

729

············gettimeofday(&_now,·NULL);

731

············qemu_log("%d@%zu.%06zu:pci_nvme_map_addr·"·"addr·0x%"PRIx64"·len·%"PRIu64""·"\n",

731

············qemu_log("%d@%zu.%06zu:pci_nvme_map_addr·"·"addr·0x%"PRIx64"·len·%"PRIu64""·"\n",

732

·····················qemu_get_thread_id(),

732

·····················qemu_get_thread_id(),

733

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

733

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

734

·····················,·addr,·len);

734

·····················,·addr,·len);

735

#line·737·"trace/trace-hw_nvme.h"

735

#line·737·"trace/trace-hw_nvme.h"

736

········}·else·{

736

········}·else·{

738

············qemu_log("pci_nvme_map_addr·"·"addr·0x%"PRIx64"·len·%"PRIu64""·"\n",·addr,·len);

738

············qemu_log("pci_nvme_map_addr·"·"addr·0x%"PRIx64"·len·%"PRIu64""·"\n",·addr,·len);

739

#line·741·"trace/trace-hw_nvme.h"

739

#line·741·"trace/trace-hw_nvme.h"

740

········}

740

········}

741

····}

741

····}

742

}

742

}

743

static·inline·void·trace_pci_nvme_map_addr(uint64_t·addr,·uint64_t·len)

743

static·inline·void·trace_pci_nvme_map_addr(uint64_t·addr,·uint64_t·len)

755

static·inline·void·_nocheck__trace_pci_nvme_map_addr_cmb(uint64_t·addr,·uint64_t·len)

755

static·inline·void·_nocheck__trace_pci_nvme_map_addr_cmb(uint64_t·addr,·uint64_t·len)

756

{

756

{

757

····if·(trace_event_get_state(TRACE_PCI_NVME_MAP_ADDR_CMB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

757

····if·(trace_event_get_state(TRACE_PCI_NVME_MAP_ADDR_CMB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

758

········if·(message_with_timestamp)·{

758

········if·(message_with_timestamp)·{

759

············struct·timeval·_now;

759

············struct·timeval·_now;

760

············gettimeofday(&_now,·NULL);

760

············gettimeofday(&_now,·NULL);

762

············qemu_log("%d@%zu.%06zu:pci_nvme_map_addr_cmb·"·"addr·0x%"PRIx64"·len·%"PRIu64""·"\n",

762

············qemu_log("%d@%zu.%06zu:pci_nvme_map_addr_cmb·"·"addr·0x%"PRIx64"·len·%"PRIu64""·"\n",

763

·····················qemu_get_thread_id(),

763

·····················qemu_get_thread_id(),

764

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

764

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

765

·····················,·addr,·len);

765

·····················,·addr,·len);

766

#line·768·"trace/trace-hw_nvme.h"

766

#line·768·"trace/trace-hw_nvme.h"

767

········}·else·{

767

········}·else·{

769

············qemu_log("pci_nvme_map_addr_cmb·"·"addr·0x%"PRIx64"·len·%"PRIu64""·"\n",·addr,·len);

769

············qemu_log("pci_nvme_map_addr_cmb·"·"addr·0x%"PRIx64"·len·%"PRIu64""·"\n",·addr,·len);

770

#line·772·"trace/trace-hw_nvme.h"

770

#line·772·"trace/trace-hw_nvme.h"

771

········}

771

········}

772

····}

772

····}

773

}

773

}

774

static·inline·void·trace_pci_nvme_map_addr_cmb(uint64_t·addr,·uint64_t·len)

774

static·inline·void·trace_pci_nvme_map_addr_cmb(uint64_t·addr,·uint64_t·len)

786

static·inline·void·_nocheck__trace_pci_nvme_map_prp(uint64_t·trans_len,·uint32_t·len,·uint64_t·prp1,·uint64_t·prp2,·int·num_prps)

786

static·inline·void·_nocheck__trace_pci_nvme_map_prp(uint64_t·trans_len,·uint32_t·len,·uint64_t·prp1,·uint64_t·prp2,·int·num_prps)

787

{

787

{

788

····if·(trace_event_get_state(TRACE_PCI_NVME_MAP_PRP)·&&·qemu_loglevel_mask(LOG_TRACE))·{

788

····if·(trace_event_get_state(TRACE_PCI_NVME_MAP_PRP)·&&·qemu_loglevel_mask(LOG_TRACE))·{

789

········if·(message_with_timestamp)·{

789

········if·(message_with_timestamp)·{

790

············struct·timeval·_now;

790

············struct·timeval·_now;

791

············gettimeofday(&_now,·NULL);

791

············gettimeofday(&_now,·NULL);

793

············qemu_log("%d@%zu.%06zu:pci_nvme_map_prp·"·"trans_len·%"PRIu64"·len·%"PRIu32"·prp1·0x%"PRIx64"·prp2·0x%"PRIx64"·num_prps·%d"·"\n",

793

············qemu_log("%d@%zu.%06zu:pci_nvme_map_prp·"·"trans_len·%"PRIu64"·len·%"PRIu32"·prp1·0x%"PRIx64"·prp2·0x%"PRIx64"·num_prps·%d"·"\n",

794

·····················qemu_get_thread_id(),

794

·····················qemu_get_thread_id(),

795

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

795

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

796

·····················,·trans_len,·len,·prp1,·prp2,·num_prps);

796

·····················,·trans_len,·len,·prp1,·prp2,·num_prps);

797

#line·799·"trace/trace-hw_nvme.h"

797

#line·799·"trace/trace-hw_nvme.h"

798

········}·else·{

798

········}·else·{

800

············qemu_log("pci_nvme_map_prp·"·"trans_len·%"PRIu64"·len·%"PRIu32"·prp1·0x%"PRIx64"·prp2·0x%"PRIx64"·num_prps·%d"·"\n",·trans_len,·len,·prp1,·prp2,·num_prps);

800

············qemu_log("pci_nvme_map_prp·"·"trans_len·%"PRIu64"·len·%"PRIu32"·prp1·0x%"PRIx64"·prp2·0x%"PRIx64"·num_prps·%d"·"\n",·trans_len,·len,·prp1,·prp2,·num_prps);

801

#line·803·"trace/trace-hw_nvme.h"

801

#line·803·"trace/trace-hw_nvme.h"

802

········}

802

········}

803

····}

803

····}

804

}

804

}

805

static·inline·void·trace_pci_nvme_map_prp(uint64_t·trans_len,·uint32_t·len,·uint64_t·prp1,·uint64_t·prp2,·int·num_prps)

805

static·inline·void·trace_pci_nvme_map_prp(uint64_t·trans_len,·uint32_t·len,·uint64_t·prp1,·uint64_t·prp2,·int·num_prps)

817

static·inline·void·_nocheck__trace_pci_nvme_map_sgl(uint8_t·typ,·uint64_t·len)

817

static·inline·void·_nocheck__trace_pci_nvme_map_sgl(uint8_t·typ,·uint64_t·len)

818

{

818

{

819

····if·(trace_event_get_state(TRACE_PCI_NVME_MAP_SGL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

819

····if·(trace_event_get_state(TRACE_PCI_NVME_MAP_SGL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

820

········if·(message_with_timestamp)·{

820

········if·(message_with_timestamp)·{

821

············struct·timeval·_now;

821

············struct·timeval·_now;

822

············gettimeofday(&_now,·NULL);

822

············gettimeofday(&_now,·NULL);

824

············qemu_log("%d@%zu.%06zu:pci_nvme_map_sgl·"·"type·0x%"PRIx8"·len·%"PRIu64""·"\n",

824

············qemu_log("%d@%zu.%06zu:pci_nvme_map_sgl·"·"type·0x%"PRIx8"·len·%"PRIu64""·"\n",

825

·····················qemu_get_thread_id(),

825

·····················qemu_get_thread_id(),

826

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

826

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

827

·····················,·typ,·len);

827

·····················,·typ,·len);

828

#line·830·"trace/trace-hw_nvme.h"

828

#line·830·"trace/trace-hw_nvme.h"

829

········}·else·{

829

········}·else·{

831

············qemu_log("pci_nvme_map_sgl·"·"type·0x%"PRIx8"·len·%"PRIu64""·"\n",·typ,·len);

831

············qemu_log("pci_nvme_map_sgl·"·"type·0x%"PRIx8"·len·%"PRIu64""·"\n",·typ,·len);

832

#line·834·"trace/trace-hw_nvme.h"

832

#line·834·"trace/trace-hw_nvme.h"

833

········}

833

········}

834

····}

834

····}

835

}

835

}

836

static·inline·void·trace_pci_nvme_map_sgl(uint8_t·typ,·uint64_t·len)

836

static·inline·void·trace_pci_nvme_map_sgl(uint8_t·typ,·uint64_t·len)

848

static·inline·void·_nocheck__trace_pci_nvme_io_cmd(uint16_t·cid,·uint32_t·nsid,·uint16_t·sqid,·uint8_t·opcode,·const·char·*·opname)

848

static·inline·void·_nocheck__trace_pci_nvme_io_cmd(uint16_t·cid,·uint32_t·nsid,·uint16_t·sqid,·uint8_t·opcode,·const·char·*·opname)

849

{

849

{

850

····if·(trace_event_get_state(TRACE_PCI_NVME_IO_CMD)·&&·qemu_loglevel_mask(LOG_TRACE))·{

850

····if·(trace_event_get_state(TRACE_PCI_NVME_IO_CMD)·&&·qemu_loglevel_mask(LOG_TRACE))·{

851

········if·(message_with_timestamp)·{

851

········if·(message_with_timestamp)·{

852

············struct·timeval·_now;

852

············struct·timeval·_now;

853

············gettimeofday(&_now,·NULL);

853

············gettimeofday(&_now,·NULL);

855

············qemu_log("%d@%zu.%06zu:pci_nvme_io_cmd·"·"cid·%"PRIu16"·nsid·0x%"PRIx32"·sqid·%"PRIu16"·opc·0x%"PRIx8"·opname·'%s'"·"\n",

855

············qemu_log("%d@%zu.%06zu:pci_nvme_io_cmd·"·"cid·%"PRIu16"·nsid·0x%"PRIx32"·sqid·%"PRIu16"·opc·0x%"PRIx8"·opname·'%s'"·"\n",

856

·····················qemu_get_thread_id(),

856

·····················qemu_get_thread_id(),

857

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

857

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

858

·····················,·cid,·nsid,·sqid,·opcode,·opname);

858

·····················,·cid,·nsid,·sqid,·opcode,·opname);

859

#line·861·"trace/trace-hw_nvme.h"

859

#line·861·"trace/trace-hw_nvme.h"

860

········}·else·{

860

········}·else·{

862

············qemu_log("pci_nvme_io_cmd·"·"cid·%"PRIu16"·nsid·0x%"PRIx32"·sqid·%"PRIu16"·opc·0x%"PRIx8"·opname·'%s'"·"\n",·cid,·nsid,·sqid,·opcode,·opname);

862

············qemu_log("pci_nvme_io_cmd·"·"cid·%"PRIu16"·nsid·0x%"PRIx32"·sqid·%"PRIu16"·opc·0x%"PRIx8"·opname·'%s'"·"\n",·cid,·nsid,·sqid,·opcode,·opname);

863

#line·865·"trace/trace-hw_nvme.h"

863

#line·865·"trace/trace-hw_nvme.h"

864

········}

864

········}

865

····}

865

····}

866

}

866

}

867

static·inline·void·trace_pci_nvme_io_cmd(uint16_t·cid,·uint32_t·nsid,·uint16_t·sqid,·uint8_t·opcode,·const·char·*·opname)

867

static·inline·void·trace_pci_nvme_io_cmd(uint16_t·cid,·uint32_t·nsid,·uint16_t·sqid,·uint8_t·opcode,·const·char·*·opname)

879

static·inline·void·_nocheck__trace_pci_nvme_admin_cmd(uint16_t·cid,·uint16_t·sqid,·uint8_t·opcode,·const·char·*·opname)

879

static·inline·void·_nocheck__trace_pci_nvme_admin_cmd(uint16_t·cid,·uint16_t·sqid,·uint8_t·opcode,·const·char·*·opname)

880

{

880

{

881

····if·(trace_event_get_state(TRACE_PCI_NVME_ADMIN_CMD)·&&·qemu_loglevel_mask(LOG_TRACE))·{

881

····if·(trace_event_get_state(TRACE_PCI_NVME_ADMIN_CMD)·&&·qemu_loglevel_mask(LOG_TRACE))·{

882

········if·(message_with_timestamp)·{

882

········if·(message_with_timestamp)·{

883

············struct·timeval·_now;

883

············struct·timeval·_now;

884

············gettimeofday(&_now,·NULL);

884

············gettimeofday(&_now,·NULL);

886

············qemu_log("%d@%zu.%06zu:pci_nvme_admin_cmd·"·"cid·%"PRIu16"·sqid·%"PRIu16"·opc·0x%"PRIx8"·opname·'%s'"·"\n",

886

············qemu_log("%d@%zu.%06zu:pci_nvme_admin_cmd·"·"cid·%"PRIu16"·sqid·%"PRIu16"·opc·0x%"PRIx8"·opname·'%s'"·"\n",

887

·····················qemu_get_thread_id(),

887

·····················qemu_get_thread_id(),

888

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

888

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

889

·····················,·cid,·sqid,·opcode,·opname);

889

·····················,·cid,·sqid,·opcode,·opname);

890

#line·892·"trace/trace-hw_nvme.h"

890

#line·892·"trace/trace-hw_nvme.h"

891

········}·else·{

891

········}·else·{

893

············qemu_log("pci_nvme_admin_cmd·"·"cid·%"PRIu16"·sqid·%"PRIu16"·opc·0x%"PRIx8"·opname·'%s'"·"\n",·cid,·sqid,·opcode,·opname);

893

············qemu_log("pci_nvme_admin_cmd·"·"cid·%"PRIu16"·sqid·%"PRIu16"·opc·0x%"PRIx8"·opname·'%s'"·"\n",·cid,·sqid,·opcode,·opname);

894

#line·896·"trace/trace-hw_nvme.h"

894

#line·896·"trace/trace-hw_nvme.h"

895

········}

895

········}

896

····}

896

····}

897

}

897

}

898

static·inline·void·trace_pci_nvme_admin_cmd(uint16_t·cid,·uint16_t·sqid,·uint8_t·opcode,·const·char·*·opname)

898

static·inline·void·trace_pci_nvme_admin_cmd(uint16_t·cid,·uint16_t·sqid,·uint8_t·opcode,·const·char·*·opname)

910

static·inline·void·_nocheck__trace_pci_nvme_flush_ns(uint32_t·nsid)

910

static·inline·void·_nocheck__trace_pci_nvme_flush_ns(uint32_t·nsid)

911

{

911

{

912

····if·(trace_event_get_state(TRACE_PCI_NVME_FLUSH_NS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

912

····if·(trace_event_get_state(TRACE_PCI_NVME_FLUSH_NS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

913

········if·(message_with_timestamp)·{

913

········if·(message_with_timestamp)·{

914

············struct·timeval·_now;

914

············struct·timeval·_now;

915

············gettimeofday(&_now,·NULL);

915

············gettimeofday(&_now,·NULL);

917

············qemu_log("%d@%zu.%06zu:pci_nvme_flush_ns·"·"nsid·0x%"PRIx32""·"\n",

917

············qemu_log("%d@%zu.%06zu:pci_nvme_flush_ns·"·"nsid·0x%"PRIx32""·"\n",

918

·····················qemu_get_thread_id(),

918

·····················qemu_get_thread_id(),

919

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

919

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

920

·····················,·nsid);

920

·····················,·nsid);

921

#line·923·"trace/trace-hw_nvme.h"

921

#line·923·"trace/trace-hw_nvme.h"

922

········}·else·{

922

········}·else·{

924

············qemu_log("pci_nvme_flush_ns·"·"nsid·0x%"PRIx32""·"\n",·nsid);

924

············qemu_log("pci_nvme_flush_ns·"·"nsid·0x%"PRIx32""·"\n",·nsid);

925

#line·927·"trace/trace-hw_nvme.h"

925

#line·927·"trace/trace-hw_nvme.h"

926

········}

926

········}

927

····}

927

····}

928

}

928

}

929

static·inline·void·trace_pci_nvme_flush_ns(uint32_t·nsid)

929

static·inline·void·trace_pci_nvme_flush_ns(uint32_t·nsid)

941

static·inline·void·_nocheck__trace_pci_nvme_format_set(uint32_t·nsid,·uint8_t·lbaf,·uint8_t·mset,·uint8_t·pi,·uint8_t·pil)

941

static·inline·void·_nocheck__trace_pci_nvme_format_set(uint32_t·nsid,·uint8_t·lbaf,·uint8_t·mset,·uint8_t·pi,·uint8_t·pil)

942

{

942

{

943

····if·(trace_event_get_state(TRACE_PCI_NVME_FORMAT_SET)·&&·qemu_loglevel_mask(LOG_TRACE))·{

943

····if·(trace_event_get_state(TRACE_PCI_NVME_FORMAT_SET)·&&·qemu_loglevel_mask(LOG_TRACE))·{

944

········if·(message_with_timestamp)·{

944

········if·(message_with_timestamp)·{

945

············struct·timeval·_now;

945

············struct·timeval·_now;

946

············gettimeofday(&_now,·NULL);

946

············gettimeofday(&_now,·NULL);

948

············qemu_log("%d@%zu.%06zu:pci_nvme_format_set·"·"nsid·%"PRIu32"·lbaf·%"PRIu8"·mset·%"PRIu8"·pi·%"PRIu8"·pil·%"PRIu8""·"\n",

948

············qemu_log("%d@%zu.%06zu:pci_nvme_format_set·"·"nsid·%"PRIu32"·lbaf·%"PRIu8"·mset·%"PRIu8"·pi·%"PRIu8"·pil·%"PRIu8""·"\n",

949

·····················qemu_get_thread_id(),

949

·····················qemu_get_thread_id(),

950

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

950

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

951

·····················,·nsid,·lbaf,·mset,·pi,·pil);

951

·····················,·nsid,·lbaf,·mset,·pi,·pil);

952

#line·954·"trace/trace-hw_nvme.h"

952

#line·954·"trace/trace-hw_nvme.h"

953

········}·else·{

953

········}·else·{

955

············qemu_log("pci_nvme_format_set·"·"nsid·%"PRIu32"·lbaf·%"PRIu8"·mset·%"PRIu8"·pi·%"PRIu8"·pil·%"PRIu8""·"\n",·nsid,·lbaf,·mset,·pi,·pil);

955

············qemu_log("pci_nvme_format_set·"·"nsid·%"PRIu32"·lbaf·%"PRIu8"·mset·%"PRIu8"·pi·%"PRIu8"·pil·%"PRIu8""·"\n",·nsid,·lbaf,·mset,·pi,·pil);

956

#line·958·"trace/trace-hw_nvme.h"

956

#line·958·"trace/trace-hw_nvme.h"

957

········}

957

········}

958

····}

958

····}

959

}

959

}

960

static·inline·void·trace_pci_nvme_format_set(uint32_t·nsid,·uint8_t·lbaf,·uint8_t·mset,·uint8_t·pi,·uint8_t·pil)

960

static·inline·void·trace_pci_nvme_format_set(uint32_t·nsid,·uint8_t·lbaf,·uint8_t·mset,·uint8_t·pi,·uint8_t·pil)

972

static·inline·void·_nocheck__trace_pci_nvme_read(uint16_t·cid,·uint32_t·nsid,·uint32_t·nlb,·uint64_t·count,·uint64_t·lba)

972

static·inline·void·_nocheck__trace_pci_nvme_read(uint16_t·cid,·uint32_t·nsid,·uint32_t·nlb,·uint64_t·count,·uint64_t·lba)

973

{

973

{

974

····if·(trace_event_get_state(TRACE_PCI_NVME_READ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

974

····if·(trace_event_get_state(TRACE_PCI_NVME_READ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

975

········if·(message_with_timestamp)·{

975

········if·(message_with_timestamp)·{

976

············struct·timeval·_now;

976

············struct·timeval·_now;

977

············gettimeofday(&_now,·NULL);

977

············gettimeofday(&_now,·NULL);

979

············qemu_log("%d@%zu.%06zu:pci_nvme_read·"·"cid·%"PRIu16"·nsid·%"PRIu32"·nlb·%"PRIu32"·count·%"PRIu64"·lba·0x%"PRIx64""·"\n",

979

············qemu_log("%d@%zu.%06zu:pci_nvme_read·"·"cid·%"PRIu16"·nsid·%"PRIu32"·nlb·%"PRIu32"·count·%"PRIu64"·lba·0x%"PRIx64""·"\n",

980

·····················qemu_get_thread_id(),

980

·····················qemu_get_thread_id(),

981

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

981

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

982

·····················,·cid,·nsid,·nlb,·count,·lba);

982

·····················,·cid,·nsid,·nlb,·count,·lba);

983

#line·985·"trace/trace-hw_nvme.h"

983

#line·985·"trace/trace-hw_nvme.h"

984

········}·else·{

984

········}·else·{

986

············qemu_log("pci_nvme_read·"·"cid·%"PRIu16"·nsid·%"PRIu32"·nlb·%"PRIu32"·count·%"PRIu64"·lba·0x%"PRIx64""·"\n",·cid,·nsid,·nlb,·count,·lba);

986

············qemu_log("pci_nvme_read·"·"cid·%"PRIu16"·nsid·%"PRIu32"·nlb·%"PRIu32"·count·%"PRIu64"·lba·0x%"PRIx64""·"\n",·cid,·nsid,·nlb,·count,·lba);

987

#line·989·"trace/trace-hw_nvme.h"

987

#line·989·"trace/trace-hw_nvme.h"

988

········}

988

········}

989

····}

989

····}

990

}

990

}

991

static·inline·void·trace_pci_nvme_read(uint16_t·cid,·uint32_t·nsid,·uint32_t·nlb,·uint64_t·count,·uint64_t·lba)

991

static·inline·void·trace_pci_nvme_read(uint16_t·cid,·uint32_t·nsid,·uint32_t·nlb,·uint64_t·count,·uint64_t·lba)

1003

static·inline·void·_nocheck__trace_pci_nvme_write(uint16_t·cid,·const·char·*·verb,·uint32_t·nsid,·uint32_t·nlb,·uint64_t·count,·uint64_t·lba)

1003

static·inline·void·_nocheck__trace_pci_nvme_write(uint16_t·cid,·const·char·*·verb,·uint32_t·nsid,·uint32_t·nlb,·uint64_t·count,·uint64_t·lba)

1004

{

1004

{

1005

····if·(trace_event_get_state(TRACE_PCI_NVME_WRITE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1005

····if·(trace_event_get_state(TRACE_PCI_NVME_WRITE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1006

········if·(message_with_timestamp)·{

1006

········if·(message_with_timestamp)·{

1007

············struct·timeval·_now;

1007

············struct·timeval·_now;

1008

············gettimeofday(&_now,·NULL);

1008

············gettimeofday(&_now,·NULL);

1010

············qemu_log("%d@%zu.%06zu:pci_nvme_write·"·"cid·%"PRIu16"·opname·'%s'·nsid·%"PRIu32"·nlb·%"PRIu32"·count·%"PRIu64"·lba·0x%"PRIx64""·"\n",

1010

············qemu_log("%d@%zu.%06zu:pci_nvme_write·"·"cid·%"PRIu16"·opname·'%s'·nsid·%"PRIu32"·nlb·%"PRIu32"·count·%"PRIu64"·lba·0x%"PRIx64""·"\n",

1011

·····················qemu_get_thread_id(),

1011

·····················qemu_get_thread_id(),

1012

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1012

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1013

·····················,·cid,·verb,·nsid,·nlb,·count,·lba);

1013

·····················,·cid,·verb,·nsid,·nlb,·count,·lba);

1014

#line·1016·"trace/trace-hw_nvme.h"

1014

#line·1016·"trace/trace-hw_nvme.h"

1015

········}·else·{

1015

········}·else·{

1017

············qemu_log("pci_nvme_write·"·"cid·%"PRIu16"·opname·'%s'·nsid·%"PRIu32"·nlb·%"PRIu32"·count·%"PRIu64"·lba·0x%"PRIx64""·"\n",·cid,·verb,·nsid,·nlb,·count,·lba);

1017

············qemu_log("pci_nvme_write·"·"cid·%"PRIu16"·opname·'%s'·nsid·%"PRIu32"·nlb·%"PRIu32"·count·%"PRIu64"·lba·0x%"PRIx64""·"\n",·cid,·verb,·nsid,·nlb,·count,·lba);

1018

#line·1020·"trace/trace-hw_nvme.h"

1018

#line·1020·"trace/trace-hw_nvme.h"

1019

········}

1019

········}

1020

····}

1020

····}

1021

}

1021

}

1022

static·inline·void·trace_pci_nvme_write(uint16_t·cid,·const·char·*·verb,·uint32_t·nsid,·uint32_t·nlb,·uint64_t·count,·uint64_t·lba)

1022

static·inline·void·trace_pci_nvme_write(uint16_t·cid,·const·char·*·verb,·uint32_t·nsid,·uint32_t·nlb,·uint64_t·count,·uint64_t·lba)

1034

static·inline·void·_nocheck__trace_pci_nvme_rw_cb(uint16_t·cid,·const·char·*·blkname)

1034

static·inline·void·_nocheck__trace_pci_nvme_rw_cb(uint16_t·cid,·const·char·*·blkname)

1035

{

1035

{

1036

····if·(trace_event_get_state(TRACE_PCI_NVME_RW_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1036

····if·(trace_event_get_state(TRACE_PCI_NVME_RW_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1037

········if·(message_with_timestamp)·{

1037

········if·(message_with_timestamp)·{

1038

············struct·timeval·_now;

1038

············struct·timeval·_now;

1039

············gettimeofday(&_now,·NULL);

1039

············gettimeofday(&_now,·NULL);

1041

············qemu_log("%d@%zu.%06zu:pci_nvme_rw_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",

1041

············qemu_log("%d@%zu.%06zu:pci_nvme_rw_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",

1042

·····················qemu_get_thread_id(),

1042

·····················qemu_get_thread_id(),

1043

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1043

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1044

·····················,·cid,·blkname);

1044

·····················,·cid,·blkname);

1045

#line·1047·"trace/trace-hw_nvme.h"

1045

#line·1047·"trace/trace-hw_nvme.h"

1046

········}·else·{

1046

········}·else·{

1048

············qemu_log("pci_nvme_rw_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",·cid,·blkname);

1048

············qemu_log("pci_nvme_rw_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",·cid,·blkname);

1049

#line·1051·"trace/trace-hw_nvme.h"

1049

#line·1051·"trace/trace-hw_nvme.h"

1050

········}

1050

········}

1051

····}

1051

····}

1052

}

1052

}

1053

static·inline·void·trace_pci_nvme_rw_cb(uint16_t·cid,·const·char·*·blkname)

1053

static·inline·void·trace_pci_nvme_rw_cb(uint16_t·cid,·const·char·*·blkname)

1065

static·inline·void·_nocheck__trace_pci_nvme_misc_cb(uint16_t·cid)

1065

static·inline·void·_nocheck__trace_pci_nvme_misc_cb(uint16_t·cid)

1066

{

1066

{

1067

····if·(trace_event_get_state(TRACE_PCI_NVME_MISC_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1067

····if·(trace_event_get_state(TRACE_PCI_NVME_MISC_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1068

········if·(message_with_timestamp)·{

1068

········if·(message_with_timestamp)·{

1069

············struct·timeval·_now;

1069

············struct·timeval·_now;

1070

············gettimeofday(&_now,·NULL);

1070

············gettimeofday(&_now,·NULL);

1072

············qemu_log("%d@%zu.%06zu:pci_nvme_misc_cb·"·"cid·%"PRIu16""·"\n",

1072

············qemu_log("%d@%zu.%06zu:pci_nvme_misc_cb·"·"cid·%"PRIu16""·"\n",

1073

·····················qemu_get_thread_id(),

1073

·····················qemu_get_thread_id(),

1074

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1074

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1075

·····················,·cid);

1075

·····················,·cid);

1076

#line·1078·"trace/trace-hw_nvme.h"

1076

#line·1078·"trace/trace-hw_nvme.h"

1077

········}·else·{

1077

········}·else·{

1079

············qemu_log("pci_nvme_misc_cb·"·"cid·%"PRIu16""·"\n",·cid);

1079

············qemu_log("pci_nvme_misc_cb·"·"cid·%"PRIu16""·"\n",·cid);

1080

#line·1082·"trace/trace-hw_nvme.h"

1080

#line·1082·"trace/trace-hw_nvme.h"

1081

········}

1081

········}

1082

····}

1082

····}

1083

}

1083

}

1084

static·inline·void·trace_pci_nvme_misc_cb(uint16_t·cid)

1084

static·inline·void·trace_pci_nvme_misc_cb(uint16_t·cid)

1096

static·inline·void·_nocheck__trace_pci_nvme_dif_rw(uint8_t·pract,·uint8_t·prinfo)

1096

static·inline·void·_nocheck__trace_pci_nvme_dif_rw(uint8_t·pract,·uint8_t·prinfo)

1097

{

1097

{

1098

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_RW)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1098

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_RW)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1099

········if·(message_with_timestamp)·{

1099

········if·(message_with_timestamp)·{

1100

············struct·timeval·_now;

1100

············struct·timeval·_now;

1101

············gettimeofday(&_now,·NULL);

1101

············gettimeofday(&_now,·NULL);

1103

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_rw·"·"pract·0x%"PRIx8"·prinfo·0x%"PRIx8""·"\n",

1103

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_rw·"·"pract·0x%"PRIx8"·prinfo·0x%"PRIx8""·"\n",

1104

·····················qemu_get_thread_id(),

1104

·····················qemu_get_thread_id(),

1105

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1105

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1106

·····················,·pract,·prinfo);

1106

·····················,·pract,·prinfo);

1107

#line·1109·"trace/trace-hw_nvme.h"

1107

#line·1109·"trace/trace-hw_nvme.h"

1108

········}·else·{

1108

········}·else·{

1110

············qemu_log("pci_nvme_dif_rw·"·"pract·0x%"PRIx8"·prinfo·0x%"PRIx8""·"\n",·pract,·prinfo);

1110

············qemu_log("pci_nvme_dif_rw·"·"pract·0x%"PRIx8"·prinfo·0x%"PRIx8""·"\n",·pract,·prinfo);

1111

#line·1113·"trace/trace-hw_nvme.h"

1111

#line·1113·"trace/trace-hw_nvme.h"

1112

········}

1112

········}

1113

····}

1113

····}

1114

}

1114

}

1115

static·inline·void·trace_pci_nvme_dif_rw(uint8_t·pract,·uint8_t·prinfo)

1115

static·inline·void·trace_pci_nvme_dif_rw(uint8_t·pract,·uint8_t·prinfo)

1127

static·inline·void·_nocheck__trace_pci_nvme_dif_rw_cb(uint16_t·cid,·const·char·*·blkname)

1127

static·inline·void·_nocheck__trace_pci_nvme_dif_rw_cb(uint16_t·cid,·const·char·*·blkname)

1128

{

1128

{

1129

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_RW_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1129

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_RW_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1130

········if·(message_with_timestamp)·{

1130

········if·(message_with_timestamp)·{

1131

············struct·timeval·_now;

1131

············struct·timeval·_now;

1132

············gettimeofday(&_now,·NULL);

1132

············gettimeofday(&_now,·NULL);

1134

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_rw_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",

1134

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_rw_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",

1135

·····················qemu_get_thread_id(),

1135

·····················qemu_get_thread_id(),

1136

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1136

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1137

·····················,·cid,·blkname);

1137

·····················,·cid,·blkname);

1138

#line·1140·"trace/trace-hw_nvme.h"

1138

#line·1140·"trace/trace-hw_nvme.h"

1139

········}·else·{

1139

········}·else·{

1141

············qemu_log("pci_nvme_dif_rw_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",·cid,·blkname);

1141

············qemu_log("pci_nvme_dif_rw_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",·cid,·blkname);

1142

#line·1144·"trace/trace-hw_nvme.h"

1142

#line·1144·"trace/trace-hw_nvme.h"

1143

········}

1143

········}

1144

····}

1144

····}

1145

}

1145

}

1146

static·inline·void·trace_pci_nvme_dif_rw_cb(uint16_t·cid,·const·char·*·blkname)

1146

static·inline·void·trace_pci_nvme_dif_rw_cb(uint16_t·cid,·const·char·*·blkname)

1158

static·inline·void·_nocheck__trace_pci_nvme_dif_rw_mdata_in_cb(uint16_t·cid,·const·char·*·blkname)

1158

static·inline·void·_nocheck__trace_pci_nvme_dif_rw_mdata_in_cb(uint16_t·cid,·const·char·*·blkname)

1159

{

1159

{

1160

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_RW_MDATA_IN_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1160

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_RW_MDATA_IN_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1161

········if·(message_with_timestamp)·{

1161

········if·(message_with_timestamp)·{

1162

············struct·timeval·_now;

1162

············struct·timeval·_now;

1163

············gettimeofday(&_now,·NULL);

1163

············gettimeofday(&_now,·NULL);

1165

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_rw_mdata_in_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",

1165

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_rw_mdata_in_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",

1166

·····················qemu_get_thread_id(),

1166

·····················qemu_get_thread_id(),

1167

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1167

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1168

·····················,·cid,·blkname);

1168

·····················,·cid,·blkname);

1169

#line·1171·"trace/trace-hw_nvme.h"

1169

#line·1171·"trace/trace-hw_nvme.h"

1170

········}·else·{

1170

········}·else·{

1172

············qemu_log("pci_nvme_dif_rw_mdata_in_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",·cid,·blkname);

1172

············qemu_log("pci_nvme_dif_rw_mdata_in_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",·cid,·blkname);

1173

#line·1175·"trace/trace-hw_nvme.h"

1173

#line·1175·"trace/trace-hw_nvme.h"

1174

········}

1174

········}

1175

····}

1175

····}

1176

}

1176

}

1177

static·inline·void·trace_pci_nvme_dif_rw_mdata_in_cb(uint16_t·cid,·const·char·*·blkname)

1177

static·inline·void·trace_pci_nvme_dif_rw_mdata_in_cb(uint16_t·cid,·const·char·*·blkname)

1189

static·inline·void·_nocheck__trace_pci_nvme_dif_rw_mdata_out_cb(uint16_t·cid,·const·char·*·blkname)

1189

static·inline·void·_nocheck__trace_pci_nvme_dif_rw_mdata_out_cb(uint16_t·cid,·const·char·*·blkname)

1190

{

1190

{

1191

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_RW_MDATA_OUT_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1191

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_RW_MDATA_OUT_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1192

········if·(message_with_timestamp)·{

1192

········if·(message_with_timestamp)·{

1193

············struct·timeval·_now;

1193

············struct·timeval·_now;

1194

············gettimeofday(&_now,·NULL);

1194

············gettimeofday(&_now,·NULL);

1196

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_rw_mdata_out_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",

1196

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_rw_mdata_out_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",

1197

·····················qemu_get_thread_id(),

1197

·····················qemu_get_thread_id(),

1198

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1198

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1199

·····················,·cid,·blkname);

1199

·····················,·cid,·blkname);

1200

#line·1202·"trace/trace-hw_nvme.h"

1200

#line·1202·"trace/trace-hw_nvme.h"

1201

········}·else·{

1201

········}·else·{

1203

············qemu_log("pci_nvme_dif_rw_mdata_out_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",·cid,·blkname);

1203

············qemu_log("pci_nvme_dif_rw_mdata_out_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",·cid,·blkname);

1204

#line·1206·"trace/trace-hw_nvme.h"

1204

#line·1206·"trace/trace-hw_nvme.h"

1205

········}

1205

········}

1206

····}

1206

····}

1207

}

1207

}

1208

static·inline·void·trace_pci_nvme_dif_rw_mdata_out_cb(uint16_t·cid,·const·char·*·blkname)

1208

static·inline·void·trace_pci_nvme_dif_rw_mdata_out_cb(uint16_t·cid,·const·char·*·blkname)

1220

static·inline·void·_nocheck__trace_pci_nvme_dif_rw_check_cb(uint16_t·cid,·uint8_t·prinfo,·uint16_t·apptag,·uint16_t·appmask,·uint32_t·reftag)

1220

static·inline·void·_nocheck__trace_pci_nvme_dif_rw_check_cb(uint16_t·cid,·uint8_t·prinfo,·uint16_t·apptag,·uint16_t·appmask,·uint32_t·reftag)

1221

{

1221

{

1222

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_RW_CHECK_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1222

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_RW_CHECK_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1223

········if·(message_with_timestamp)·{

1223

········if·(message_with_timestamp)·{

1224

············struct·timeval·_now;

1224

············struct·timeval·_now;

1225

············gettimeofday(&_now,·NULL);

1225

············gettimeofday(&_now,·NULL);

1227

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_rw_check_cb·"·"cid·%"PRIu16"·prinfo·0x%"PRIx8"·apptag·0x%"PRIx16"·appmask·0x%"PRIx16"·reftag·0x%"PRIx32""·"\n",

1227

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_rw_check_cb·"·"cid·%"PRIu16"·prinfo·0x%"PRIx8"·apptag·0x%"PRIx16"·appmask·0x%"PRIx16"·reftag·0x%"PRIx32""·"\n",

1228

·····················qemu_get_thread_id(),

1228

·····················qemu_get_thread_id(),

1229

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1229

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1230

·····················,·cid,·prinfo,·apptag,·appmask,·reftag);

1230

·····················,·cid,·prinfo,·apptag,·appmask,·reftag);

1231

#line·1233·"trace/trace-hw_nvme.h"

1231

#line·1233·"trace/trace-hw_nvme.h"

1232

········}·else·{

1232

········}·else·{

1234

············qemu_log("pci_nvme_dif_rw_check_cb·"·"cid·%"PRIu16"·prinfo·0x%"PRIx8"·apptag·0x%"PRIx16"·appmask·0x%"PRIx16"·reftag·0x%"PRIx32""·"\n",·cid,·prinfo,·apptag,·appmask,·reftag);

1234

············qemu_log("pci_nvme_dif_rw_check_cb·"·"cid·%"PRIu16"·prinfo·0x%"PRIx8"·apptag·0x%"PRIx16"·appmask·0x%"PRIx16"·reftag·0x%"PRIx32""·"\n",·cid,·prinfo,·apptag,·appmask,·reftag);

1235

#line·1237·"trace/trace-hw_nvme.h"

1235

#line·1237·"trace/trace-hw_nvme.h"

1236

········}

1236

········}

1237

····}

1237

····}

1238

}

1238

}

1239

static·inline·void·trace_pci_nvme_dif_rw_check_cb(uint16_t·cid,·uint8_t·prinfo,·uint16_t·apptag,·uint16_t·appmask,·uint32_t·reftag)

1239

static·inline·void·trace_pci_nvme_dif_rw_check_cb(uint16_t·cid,·uint8_t·prinfo,·uint16_t·apptag,·uint16_t·appmask,·uint32_t·reftag)

1251

static·inline·void·_nocheck__trace_pci_nvme_dif_pract_generate_dif(size_t·len,·size_t·lba_size,·size_t·chksum_len,·uint16_t·apptag,·uint32_t·reftag)

1251

static·inline·void·_nocheck__trace_pci_nvme_dif_pract_generate_dif(size_t·len,·size_t·lba_size,·size_t·chksum_len,·uint16_t·apptag,·uint32_t·reftag)

1252

{

1252

{

1253

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_PRACT_GENERATE_DIF)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1253

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_PRACT_GENERATE_DIF)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1254

········if·(message_with_timestamp)·{

1254

········if·(message_with_timestamp)·{

1255

············struct·timeval·_now;

1255

············struct·timeval·_now;

1256

············gettimeofday(&_now,·NULL);

1256

············gettimeofday(&_now,·NULL);

1258

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_pract_generate_dif·"·"len·%zu·lba_size·%zu·chksum_len·%zu·apptag·0x%"PRIx16"·reftag·0x%"PRIx32""·"\n",

1258

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_pract_generate_dif·"·"len·%zu·lba_size·%zu·chksum_len·%zu·apptag·0x%"PRIx16"·reftag·0x%"PRIx32""·"\n",

1259

·····················qemu_get_thread_id(),

1259

·····················qemu_get_thread_id(),

1260

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1260

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1261

·····················,·len,·lba_size,·chksum_len,·apptag,·reftag);

1261

·····················,·len,·lba_size,·chksum_len,·apptag,·reftag);

1262

#line·1264·"trace/trace-hw_nvme.h"

1262

#line·1264·"trace/trace-hw_nvme.h"

1263

········}·else·{

1263

········}·else·{

1265

············qemu_log("pci_nvme_dif_pract_generate_dif·"·"len·%zu·lba_size·%zu·chksum_len·%zu·apptag·0x%"PRIx16"·reftag·0x%"PRIx32""·"\n",·len,·lba_size,·chksum_len,·apptag,·reftag);

1265

············qemu_log("pci_nvme_dif_pract_generate_dif·"·"len·%zu·lba_size·%zu·chksum_len·%zu·apptag·0x%"PRIx16"·reftag·0x%"PRIx32""·"\n",·len,·lba_size,·chksum_len,·apptag,·reftag);

1266

#line·1268·"trace/trace-hw_nvme.h"

1266

#line·1268·"trace/trace-hw_nvme.h"

1267

········}

1267

········}

1268

····}

1268

····}

1269

}

1269

}

1270

static·inline·void·trace_pci_nvme_dif_pract_generate_dif(size_t·len,·size_t·lba_size,·size_t·chksum_len,·uint16_t·apptag,·uint32_t·reftag)

1270

static·inline·void·trace_pci_nvme_dif_pract_generate_dif(size_t·len,·size_t·lba_size,·size_t·chksum_len,·uint16_t·apptag,·uint32_t·reftag)

1282

static·inline·void·_nocheck__trace_pci_nvme_dif_check(uint8_t·prinfo,·uint16_t·chksum_len)

1282

static·inline·void·_nocheck__trace_pci_nvme_dif_check(uint8_t·prinfo,·uint16_t·chksum_len)

1283

{

1283

{

1284

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_CHECK)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1284

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_CHECK)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1285

········if·(message_with_timestamp)·{

1285

········if·(message_with_timestamp)·{

1286

············struct·timeval·_now;

1286

············struct·timeval·_now;

1287

············gettimeofday(&_now,·NULL);

1287

············gettimeofday(&_now,·NULL);

1289

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_check·"·"prinfo·0x%"PRIx8"·chksum_len·%"PRIu16""·"\n",

1289

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_check·"·"prinfo·0x%"PRIx8"·chksum_len·%"PRIu16""·"\n",

1290

·····················qemu_get_thread_id(),

1290

·····················qemu_get_thread_id(),

1291

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1291

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1292

·····················,·prinfo,·chksum_len);

1292

·····················,·prinfo,·chksum_len);

1293

#line·1295·"trace/trace-hw_nvme.h"

1293

#line·1295·"trace/trace-hw_nvme.h"

1294

········}·else·{

1294

········}·else·{

1296

············qemu_log("pci_nvme_dif_check·"·"prinfo·0x%"PRIx8"·chksum_len·%"PRIu16""·"\n",·prinfo,·chksum_len);

1296

············qemu_log("pci_nvme_dif_check·"·"prinfo·0x%"PRIx8"·chksum_len·%"PRIu16""·"\n",·prinfo,·chksum_len);

1297

#line·1299·"trace/trace-hw_nvme.h"

1297

#line·1299·"trace/trace-hw_nvme.h"

1298

········}

1298

········}

1299

····}

1299

····}

1300

}

1300

}

1301

static·inline·void·trace_pci_nvme_dif_check(uint8_t·prinfo,·uint16_t·chksum_len)

1301

static·inline·void·trace_pci_nvme_dif_check(uint8_t·prinfo,·uint16_t·chksum_len)

1313

static·inline·void·_nocheck__trace_pci_nvme_dif_prchk_disabled(uint16_t·apptag,·uint32_t·reftag)

1313

static·inline·void·_nocheck__trace_pci_nvme_dif_prchk_disabled(uint16_t·apptag,·uint32_t·reftag)

1314

{

1314

{

1315

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_PRCHK_DISABLED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1315

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_PRCHK_DISABLED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1316

········if·(message_with_timestamp)·{

1316

········if·(message_with_timestamp)·{

1317

············struct·timeval·_now;

1317

············struct·timeval·_now;

1318

············gettimeofday(&_now,·NULL);

1318

············gettimeofday(&_now,·NULL);

1320

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_prchk_disabled·"·"apptag·0x%"PRIx16"·reftag·0x%"PRIx32""·"\n",

1320

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_prchk_disabled·"·"apptag·0x%"PRIx16"·reftag·0x%"PRIx32""·"\n",

1321

·····················qemu_get_thread_id(),

1321

·····················qemu_get_thread_id(),

1322

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1322

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1323

·····················,·apptag,·reftag);

1323

·····················,·apptag,·reftag);

1324

#line·1326·"trace/trace-hw_nvme.h"

1324

#line·1326·"trace/trace-hw_nvme.h"

1325

········}·else·{

1325

········}·else·{

1327

············qemu_log("pci_nvme_dif_prchk_disabled·"·"apptag·0x%"PRIx16"·reftag·0x%"PRIx32""·"\n",·apptag,·reftag);

1327

············qemu_log("pci_nvme_dif_prchk_disabled·"·"apptag·0x%"PRIx16"·reftag·0x%"PRIx32""·"\n",·apptag,·reftag);

1328

#line·1330·"trace/trace-hw_nvme.h"

1328

#line·1330·"trace/trace-hw_nvme.h"

1329

········}

1329

········}

1330

····}

1330

····}

1331

}

1331

}

1332

static·inline·void·trace_pci_nvme_dif_prchk_disabled(uint16_t·apptag,·uint32_t·reftag)

1332

static·inline·void·trace_pci_nvme_dif_prchk_disabled(uint16_t·apptag,·uint32_t·reftag)

1344

static·inline·void·_nocheck__trace_pci_nvme_dif_prchk_guard(uint16_t·guard,·uint16_t·crc)

1344

static·inline·void·_nocheck__trace_pci_nvme_dif_prchk_guard(uint16_t·guard,·uint16_t·crc)

1345

{

1345

{

1346

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_PRCHK_GUARD)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1346

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_PRCHK_GUARD)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1347

········if·(message_with_timestamp)·{

1347

········if·(message_with_timestamp)·{

1348

············struct·timeval·_now;

1348

············struct·timeval·_now;

1349

············gettimeofday(&_now,·NULL);

1349

············gettimeofday(&_now,·NULL);

1351

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_prchk_guard·"·"guard·0x%"PRIx16"·crc·0x%"PRIx16""·"\n",

1351

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_prchk_guard·"·"guard·0x%"PRIx16"·crc·0x%"PRIx16""·"\n",

1352

·····················qemu_get_thread_id(),

1352

·····················qemu_get_thread_id(),

1353

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1353

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1354

·····················,·guard,·crc);

1354

·····················,·guard,·crc);

1355

#line·1357·"trace/trace-hw_nvme.h"

1355

#line·1357·"trace/trace-hw_nvme.h"

1356

········}·else·{

1356

········}·else·{

1358

············qemu_log("pci_nvme_dif_prchk_guard·"·"guard·0x%"PRIx16"·crc·0x%"PRIx16""·"\n",·guard,·crc);

1358

············qemu_log("pci_nvme_dif_prchk_guard·"·"guard·0x%"PRIx16"·crc·0x%"PRIx16""·"\n",·guard,·crc);

1359

#line·1361·"trace/trace-hw_nvme.h"

1359

#line·1361·"trace/trace-hw_nvme.h"

1360

········}

1360

········}

1361

····}

1361

····}

1362

}

1362

}

1363

static·inline·void·trace_pci_nvme_dif_prchk_guard(uint16_t·guard,·uint16_t·crc)

1363

static·inline·void·trace_pci_nvme_dif_prchk_guard(uint16_t·guard,·uint16_t·crc)

1375

static·inline·void·_nocheck__trace_pci_nvme_dif_prchk_apptag(uint16_t·apptag,·uint16_t·elbat,·uint16_t·elbatm)

1375

static·inline·void·_nocheck__trace_pci_nvme_dif_prchk_apptag(uint16_t·apptag,·uint16_t·elbat,·uint16_t·elbatm)

1376

{

1376

{

1377

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_PRCHK_APPTAG)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1377

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_PRCHK_APPTAG)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1378

········if·(message_with_timestamp)·{

1378

········if·(message_with_timestamp)·{

1379

············struct·timeval·_now;

1379

············struct·timeval·_now;

1380

············gettimeofday(&_now,·NULL);

1380

············gettimeofday(&_now,·NULL);

1382

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_prchk_apptag·"·"apptag·0x%"PRIx16"·elbat·0x%"PRIx16"·elbatm·0x%"PRIx16""·"\n",

1382

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_prchk_apptag·"·"apptag·0x%"PRIx16"·elbat·0x%"PRIx16"·elbatm·0x%"PRIx16""·"\n",

1383

·····················qemu_get_thread_id(),

1383

·····················qemu_get_thread_id(),

1384

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1384

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1385

·····················,·apptag,·elbat,·elbatm);

1385

·····················,·apptag,·elbat,·elbatm);

1386

#line·1388·"trace/trace-hw_nvme.h"

1386

#line·1388·"trace/trace-hw_nvme.h"

1387

········}·else·{

1387

········}·else·{

1389

············qemu_log("pci_nvme_dif_prchk_apptag·"·"apptag·0x%"PRIx16"·elbat·0x%"PRIx16"·elbatm·0x%"PRIx16""·"\n",·apptag,·elbat,·elbatm);

1389

············qemu_log("pci_nvme_dif_prchk_apptag·"·"apptag·0x%"PRIx16"·elbat·0x%"PRIx16"·elbatm·0x%"PRIx16""·"\n",·apptag,·elbat,·elbatm);

1390

#line·1392·"trace/trace-hw_nvme.h"

1390

#line·1392·"trace/trace-hw_nvme.h"

1391

········}

1391

········}

1392

····}

1392

····}

1393

}

1393

}

1394

static·inline·void·trace_pci_nvme_dif_prchk_apptag(uint16_t·apptag,·uint16_t·elbat,·uint16_t·elbatm)

1394

static·inline·void·trace_pci_nvme_dif_prchk_apptag(uint16_t·apptag,·uint16_t·elbat,·uint16_t·elbatm)

1406

static·inline·void·_nocheck__trace_pci_nvme_dif_prchk_reftag(uint32_t·reftag,·uint32_t·elbrt)

1406

static·inline·void·_nocheck__trace_pci_nvme_dif_prchk_reftag(uint32_t·reftag,·uint32_t·elbrt)

1407

{

1407

{

1408

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_PRCHK_REFTAG)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1408

····if·(trace_event_get_state(TRACE_PCI_NVME_DIF_PRCHK_REFTAG)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1409

········if·(message_with_timestamp)·{

1409

········if·(message_with_timestamp)·{

1410

············struct·timeval·_now;

1410

············struct·timeval·_now;

1411

············gettimeofday(&_now,·NULL);

1411

············gettimeofday(&_now,·NULL);

1413

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_prchk_reftag·"·"reftag·0x%"PRIx32"·elbrt·0x%"PRIx32""·"\n",

1413

············qemu_log("%d@%zu.%06zu:pci_nvme_dif_prchk_reftag·"·"reftag·0x%"PRIx32"·elbrt·0x%"PRIx32""·"\n",

1414

·····················qemu_get_thread_id(),

1414

·····················qemu_get_thread_id(),

1415

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1415

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1416

·····················,·reftag,·elbrt);

1416

·····················,·reftag,·elbrt);

1417

#line·1419·"trace/trace-hw_nvme.h"

1417

#line·1419·"trace/trace-hw_nvme.h"

1418

········}·else·{

1418

········}·else·{

1420

············qemu_log("pci_nvme_dif_prchk_reftag·"·"reftag·0x%"PRIx32"·elbrt·0x%"PRIx32""·"\n",·reftag,·elbrt);

1420

············qemu_log("pci_nvme_dif_prchk_reftag·"·"reftag·0x%"PRIx32"·elbrt·0x%"PRIx32""·"\n",·reftag,·elbrt);

1421

#line·1423·"trace/trace-hw_nvme.h"

1421

#line·1423·"trace/trace-hw_nvme.h"

1422

········}

1422

········}

1423

····}

1423

····}

1424

}

1424

}

1425

static·inline·void·trace_pci_nvme_dif_prchk_reftag(uint32_t·reftag,·uint32_t·elbrt)

1425

static·inline·void·trace_pci_nvme_dif_prchk_reftag(uint32_t·reftag,·uint32_t·elbrt)

1437

static·inline·void·_nocheck__trace_pci_nvme_copy(uint16_t·cid,·uint32_t·nsid,·uint16_t·nr,·uint8_t·format)

1437

static·inline·void·_nocheck__trace_pci_nvme_copy(uint16_t·cid,·uint32_t·nsid,·uint16_t·nr,·uint8_t·format)

1438

{

1438

{

1439

····if·(trace_event_get_state(TRACE_PCI_NVME_COPY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1439

····if·(trace_event_get_state(TRACE_PCI_NVME_COPY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1440

········if·(message_with_timestamp)·{

1440

········if·(message_with_timestamp)·{

1441

············struct·timeval·_now;

1441

············struct·timeval·_now;

1442

············gettimeofday(&_now,·NULL);

1442

············gettimeofday(&_now,·NULL);

1444

············qemu_log("%d@%zu.%06zu:pci_nvme_copy·"·"cid·%"PRIu16"·nsid·%"PRIu32"·nr·%"PRIu16"·format·0x%"PRIx8""·"\n",

1444

············qemu_log("%d@%zu.%06zu:pci_nvme_copy·"·"cid·%"PRIu16"·nsid·%"PRIu32"·nr·%"PRIu16"·format·0x%"PRIx8""·"\n",

1445

·····················qemu_get_thread_id(),

1445

·····················qemu_get_thread_id(),

1446

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1446

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1447

·····················,·cid,·nsid,·nr,·format);

1447

·····················,·cid,·nsid,·nr,·format);

1448

#line·1450·"trace/trace-hw_nvme.h"

1448

#line·1450·"trace/trace-hw_nvme.h"

1449

········}·else·{

1449

········}·else·{

1451

············qemu_log("pci_nvme_copy·"·"cid·%"PRIu16"·nsid·%"PRIu32"·nr·%"PRIu16"·format·0x%"PRIx8""·"\n",·cid,·nsid,·nr,·format);

1451

············qemu_log("pci_nvme_copy·"·"cid·%"PRIu16"·nsid·%"PRIu32"·nr·%"PRIu16"·format·0x%"PRIx8""·"\n",·cid,·nsid,·nr,·format);

1452

#line·1454·"trace/trace-hw_nvme.h"

1452

#line·1454·"trace/trace-hw_nvme.h"

1453

········}

1453

········}

1454

····}

1454

····}

1455

}

1455

}

1456

static·inline·void·trace_pci_nvme_copy(uint16_t·cid,·uint32_t·nsid,·uint16_t·nr,·uint8_t·format)

1456

static·inline·void·trace_pci_nvme_copy(uint16_t·cid,·uint32_t·nsid,·uint16_t·nr,·uint8_t·format)

1468

static·inline·void·_nocheck__trace_pci_nvme_copy_source_range(uint64_t·slba,·uint32_t·nlb)

1468

static·inline·void·_nocheck__trace_pci_nvme_copy_source_range(uint64_t·slba,·uint32_t·nlb)

1469

{

1469

{

1470

····if·(trace_event_get_state(TRACE_PCI_NVME_COPY_SOURCE_RANGE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1470

····if·(trace_event_get_state(TRACE_PCI_NVME_COPY_SOURCE_RANGE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1471

········if·(message_with_timestamp)·{

1471

········if·(message_with_timestamp)·{

1472

············struct·timeval·_now;

1472

············struct·timeval·_now;

1473

············gettimeofday(&_now,·NULL);

1473

············gettimeofday(&_now,·NULL);

1475

············qemu_log("%d@%zu.%06zu:pci_nvme_copy_source_range·"·"slba·0x%"PRIx64"·nlb·%"PRIu32""·"\n",

1475

············qemu_log("%d@%zu.%06zu:pci_nvme_copy_source_range·"·"slba·0x%"PRIx64"·nlb·%"PRIu32""·"\n",

1476

·····················qemu_get_thread_id(),

1476

·····················qemu_get_thread_id(),

1477

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1477

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1478

·····················,·slba,·nlb);

1478

·····················,·slba,·nlb);

1479

#line·1481·"trace/trace-hw_nvme.h"

1479

#line·1481·"trace/trace-hw_nvme.h"

1480

········}·else·{

1480

········}·else·{

1482

············qemu_log("pci_nvme_copy_source_range·"·"slba·0x%"PRIx64"·nlb·%"PRIu32""·"\n",·slba,·nlb);

1482

············qemu_log("pci_nvme_copy_source_range·"·"slba·0x%"PRIx64"·nlb·%"PRIu32""·"\n",·slba,·nlb);

1483

#line·1485·"trace/trace-hw_nvme.h"

1483

#line·1485·"trace/trace-hw_nvme.h"

1484

········}

1484

········}

1485

····}

1485

····}

1486

}

1486

}

1487

static·inline·void·trace_pci_nvme_copy_source_range(uint64_t·slba,·uint32_t·nlb)

1487

static·inline·void·trace_pci_nvme_copy_source_range(uint64_t·slba,·uint32_t·nlb)

1499

static·inline·void·_nocheck__trace_pci_nvme_copy_out(uint64_t·slba,·uint32_t·nlb)

1499

static·inline·void·_nocheck__trace_pci_nvme_copy_out(uint64_t·slba,·uint32_t·nlb)

1500

{

1500

{

1501

····if·(trace_event_get_state(TRACE_PCI_NVME_COPY_OUT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1501

····if·(trace_event_get_state(TRACE_PCI_NVME_COPY_OUT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1502

········if·(message_with_timestamp)·{

1502

········if·(message_with_timestamp)·{

1503

············struct·timeval·_now;

1503

············struct·timeval·_now;

1504

············gettimeofday(&_now,·NULL);

1504

············gettimeofday(&_now,·NULL);

1506

············qemu_log("%d@%zu.%06zu:pci_nvme_copy_out·"·"slba·0x%"PRIx64"·nlb·%"PRIu32""·"\n",

1506

············qemu_log("%d@%zu.%06zu:pci_nvme_copy_out·"·"slba·0x%"PRIx64"·nlb·%"PRIu32""·"\n",

1507

·····················qemu_get_thread_id(),

1507

·····················qemu_get_thread_id(),

1508

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1508

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1509

·····················,·slba,·nlb);

1509

·····················,·slba,·nlb);

1510

#line·1512·"trace/trace-hw_nvme.h"

1510

#line·1512·"trace/trace-hw_nvme.h"

1511

········}·else·{

1511

········}·else·{

1513

············qemu_log("pci_nvme_copy_out·"·"slba·0x%"PRIx64"·nlb·%"PRIu32""·"\n",·slba,·nlb);

1513

············qemu_log("pci_nvme_copy_out·"·"slba·0x%"PRIx64"·nlb·%"PRIu32""·"\n",·slba,·nlb);

1514

#line·1516·"trace/trace-hw_nvme.h"

1514

#line·1516·"trace/trace-hw_nvme.h"

1515

········}

1515

········}

1516

····}

1516

····}

1517

}

1517

}

1518

static·inline·void·trace_pci_nvme_copy_out(uint64_t·slba,·uint32_t·nlb)

1518

static·inline·void·trace_pci_nvme_copy_out(uint64_t·slba,·uint32_t·nlb)

1530

static·inline·void·_nocheck__trace_pci_nvme_verify(uint16_t·cid,·uint32_t·nsid,·uint64_t·slba,·uint32_t·nlb)

1530

static·inline·void·_nocheck__trace_pci_nvme_verify(uint16_t·cid,·uint32_t·nsid,·uint64_t·slba,·uint32_t·nlb)

1531

{

1531

{

1532

····if·(trace_event_get_state(TRACE_PCI_NVME_VERIFY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1532

····if·(trace_event_get_state(TRACE_PCI_NVME_VERIFY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1533

········if·(message_with_timestamp)·{

1533

········if·(message_with_timestamp)·{

1534

············struct·timeval·_now;

1534

············struct·timeval·_now;

1535

············gettimeofday(&_now,·NULL);

1535

············gettimeofday(&_now,·NULL);

1537

············qemu_log("%d@%zu.%06zu:pci_nvme_verify·"·"cid·%"PRIu16"·nsid·%"PRIu32"·slba·0x%"PRIx64"·nlb·%"PRIu32""·"\n",

1537

············qemu_log("%d@%zu.%06zu:pci_nvme_verify·"·"cid·%"PRIu16"·nsid·%"PRIu32"·slba·0x%"PRIx64"·nlb·%"PRIu32""·"\n",

1538

·····················qemu_get_thread_id(),

1538

·····················qemu_get_thread_id(),

1539

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1539

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1540

·····················,·cid,·nsid,·slba,·nlb);

1540

·····················,·cid,·nsid,·slba,·nlb);

1541

#line·1543·"trace/trace-hw_nvme.h"

1541

#line·1543·"trace/trace-hw_nvme.h"

1542

········}·else·{

1542

········}·else·{

1544

············qemu_log("pci_nvme_verify·"·"cid·%"PRIu16"·nsid·%"PRIu32"·slba·0x%"PRIx64"·nlb·%"PRIu32""·"\n",·cid,·nsid,·slba,·nlb);

1544

············qemu_log("pci_nvme_verify·"·"cid·%"PRIu16"·nsid·%"PRIu32"·slba·0x%"PRIx64"·nlb·%"PRIu32""·"\n",·cid,·nsid,·slba,·nlb);

1545

#line·1547·"trace/trace-hw_nvme.h"

1545

#line·1547·"trace/trace-hw_nvme.h"

1546

········}

1546

········}

1547

····}

1547

····}

1548

}

1548

}

1549

static·inline·void·trace_pci_nvme_verify(uint16_t·cid,·uint32_t·nsid,·uint64_t·slba,·uint32_t·nlb)

1549

static·inline·void·trace_pci_nvme_verify(uint16_t·cid,·uint32_t·nsid,·uint64_t·slba,·uint32_t·nlb)

1561

static·inline·void·_nocheck__trace_pci_nvme_verify_mdata_in_cb(uint16_t·cid,·const·char·*·blkname)

1561

static·inline·void·_nocheck__trace_pci_nvme_verify_mdata_in_cb(uint16_t·cid,·const·char·*·blkname)

1562

{

1562

{

1563

····if·(trace_event_get_state(TRACE_PCI_NVME_VERIFY_MDATA_IN_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1563

····if·(trace_event_get_state(TRACE_PCI_NVME_VERIFY_MDATA_IN_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1564

········if·(message_with_timestamp)·{

1564

········if·(message_with_timestamp)·{

1565

············struct·timeval·_now;

1565

············struct·timeval·_now;

1566

············gettimeofday(&_now,·NULL);

1566

············gettimeofday(&_now,·NULL);

1568

············qemu_log("%d@%zu.%06zu:pci_nvme_verify_mdata_in_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",

1568

············qemu_log("%d@%zu.%06zu:pci_nvme_verify_mdata_in_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",

1569

·····················qemu_get_thread_id(),

1569

·····················qemu_get_thread_id(),

1570

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1570

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1571

·····················,·cid,·blkname);

1571

·····················,·cid,·blkname);

1572

#line·1574·"trace/trace-hw_nvme.h"

1572

#line·1574·"trace/trace-hw_nvme.h"

1573

········}·else·{

1573

········}·else·{

1575

············qemu_log("pci_nvme_verify_mdata_in_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",·cid,·blkname);

1575

············qemu_log("pci_nvme_verify_mdata_in_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",·cid,·blkname);

1576

#line·1578·"trace/trace-hw_nvme.h"

1576

#line·1578·"trace/trace-hw_nvme.h"

1577

········}

1577

········}

1578

····}

1578

····}

1579

}

1579

}

1580

static·inline·void·trace_pci_nvme_verify_mdata_in_cb(uint16_t·cid,·const·char·*·blkname)

1580

static·inline·void·trace_pci_nvme_verify_mdata_in_cb(uint16_t·cid,·const·char·*·blkname)

1592

static·inline·void·_nocheck__trace_pci_nvme_verify_cb(uint16_t·cid,·uint8_t·prinfo,·uint16_t·apptag,·uint16_t·appmask,·uint32_t·reftag)

1592

static·inline·void·_nocheck__trace_pci_nvme_verify_cb(uint16_t·cid,·uint8_t·prinfo,·uint16_t·apptag,·uint16_t·appmask,·uint32_t·reftag)

1593

{

1593

{

1594

····if·(trace_event_get_state(TRACE_PCI_NVME_VERIFY_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1594

····if·(trace_event_get_state(TRACE_PCI_NVME_VERIFY_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1595

········if·(message_with_timestamp)·{

1595

········if·(message_with_timestamp)·{

1596

············struct·timeval·_now;

1596

············struct·timeval·_now;

1597

············gettimeofday(&_now,·NULL);

1597

············gettimeofday(&_now,·NULL);

1599

············qemu_log("%d@%zu.%06zu:pci_nvme_verify_cb·"·"cid·%"PRIu16"·prinfo·0x%"PRIx8"·apptag·0x%"PRIx16"·appmask·0x%"PRIx16"·reftag·0x%"PRIx32""·"\n",

1599

············qemu_log("%d@%zu.%06zu:pci_nvme_verify_cb·"·"cid·%"PRIu16"·prinfo·0x%"PRIx8"·apptag·0x%"PRIx16"·appmask·0x%"PRIx16"·reftag·0x%"PRIx32""·"\n",

1600

·····················qemu_get_thread_id(),

1600

·····················qemu_get_thread_id(),

1601

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1601

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1602

·····················,·cid,·prinfo,·apptag,·appmask,·reftag);

1602

·····················,·cid,·prinfo,·apptag,·appmask,·reftag);

1603

#line·1605·"trace/trace-hw_nvme.h"

1603

#line·1605·"trace/trace-hw_nvme.h"

1604

········}·else·{

1604

········}·else·{

1606

············qemu_log("pci_nvme_verify_cb·"·"cid·%"PRIu16"·prinfo·0x%"PRIx8"·apptag·0x%"PRIx16"·appmask·0x%"PRIx16"·reftag·0x%"PRIx32""·"\n",·cid,·prinfo,·apptag,·appmask,·reftag);

1606

············qemu_log("pci_nvme_verify_cb·"·"cid·%"PRIu16"·prinfo·0x%"PRIx8"·apptag·0x%"PRIx16"·appmask·0x%"PRIx16"·reftag·0x%"PRIx32""·"\n",·cid,·prinfo,·apptag,·appmask,·reftag);

1607

#line·1609·"trace/trace-hw_nvme.h"

1607

#line·1609·"trace/trace-hw_nvme.h"

1608

········}

1608

········}

1609

····}

1609

····}

1610

}

1610

}

1611

static·inline·void·trace_pci_nvme_verify_cb(uint16_t·cid,·uint8_t·prinfo,·uint16_t·apptag,·uint16_t·appmask,·uint32_t·reftag)

1611

static·inline·void·trace_pci_nvme_verify_cb(uint16_t·cid,·uint8_t·prinfo,·uint16_t·apptag,·uint16_t·appmask,·uint32_t·reftag)

1623

static·inline·void·_nocheck__trace_pci_nvme_rw_complete_cb(uint16_t·cid,·const·char·*·blkname)

1623

static·inline·void·_nocheck__trace_pci_nvme_rw_complete_cb(uint16_t·cid,·const·char·*·blkname)

1624

{

1624

{

1625

····if·(trace_event_get_state(TRACE_PCI_NVME_RW_COMPLETE_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1625

····if·(trace_event_get_state(TRACE_PCI_NVME_RW_COMPLETE_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1626

········if·(message_with_timestamp)·{

1626

········if·(message_with_timestamp)·{

1627

············struct·timeval·_now;

1627

············struct·timeval·_now;

1628

············gettimeofday(&_now,·NULL);

1628

············gettimeofday(&_now,·NULL);

1630

············qemu_log("%d@%zu.%06zu:pci_nvme_rw_complete_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",

1630

············qemu_log("%d@%zu.%06zu:pci_nvme_rw_complete_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",

1631

·····················qemu_get_thread_id(),

1631

·····················qemu_get_thread_id(),

1632

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1632

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1633

·····················,·cid,·blkname);

1633

·····················,·cid,·blkname);

1634

#line·1636·"trace/trace-hw_nvme.h"

1634

#line·1636·"trace/trace-hw_nvme.h"

1635

········}·else·{

1635

········}·else·{

1637

············qemu_log("pci_nvme_rw_complete_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",·cid,·blkname);

1637

············qemu_log("pci_nvme_rw_complete_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",·cid,·blkname);

1638

#line·1640·"trace/trace-hw_nvme.h"

1638

#line·1640·"trace/trace-hw_nvme.h"

1639

········}

1639

········}

1640

····}

1640

····}

1641

}

1641

}

1642

static·inline·void·trace_pci_nvme_rw_complete_cb(uint16_t·cid,·const·char·*·blkname)

1642

static·inline·void·trace_pci_nvme_rw_complete_cb(uint16_t·cid,·const·char·*·blkname)

1654

static·inline·void·_nocheck__trace_pci_nvme_block_status(int64_t·offset,·int64_t·bytes,·int64_t·pnum,·int·ret,·bool·zeroed)

1654

static·inline·void·_nocheck__trace_pci_nvme_block_status(int64_t·offset,·int64_t·bytes,·int64_t·pnum,·int·ret,·bool·zeroed)

1655

{

1655

{

1656

····if·(trace_event_get_state(TRACE_PCI_NVME_BLOCK_STATUS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1656

····if·(trace_event_get_state(TRACE_PCI_NVME_BLOCK_STATUS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1657

········if·(message_with_timestamp)·{

1657

········if·(message_with_timestamp)·{

1658

············struct·timeval·_now;

1658

············struct·timeval·_now;

1659

············gettimeofday(&_now,·NULL);

1659

············gettimeofday(&_now,·NULL);

1661

············qemu_log("%d@%zu.%06zu:pci_nvme_block_status·"·"offset·%"PRId64"·bytes·%"PRId64"·pnum·%"PRId64"·ret·0x%x·zeroed·%d"·"\n",

1661

············qemu_log("%d@%zu.%06zu:pci_nvme_block_status·"·"offset·%"PRId64"·bytes·%"PRId64"·pnum·%"PRId64"·ret·0x%x·zeroed·%d"·"\n",

1662

·····················qemu_get_thread_id(),

1662

·····················qemu_get_thread_id(),

1663

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1663

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1664

·····················,·offset,·bytes,·pnum,·ret,·zeroed);

1664

·····················,·offset,·bytes,·pnum,·ret,·zeroed);

1665

#line·1667·"trace/trace-hw_nvme.h"

1665

#line·1667·"trace/trace-hw_nvme.h"

1666

········}·else·{

1666

········}·else·{

1668

············qemu_log("pci_nvme_block_status·"·"offset·%"PRId64"·bytes·%"PRId64"·pnum·%"PRId64"·ret·0x%x·zeroed·%d"·"\n",·offset,·bytes,·pnum,·ret,·zeroed);

1668

············qemu_log("pci_nvme_block_status·"·"offset·%"PRId64"·bytes·%"PRId64"·pnum·%"PRId64"·ret·0x%x·zeroed·%d"·"\n",·offset,·bytes,·pnum,·ret,·zeroed);

1669

#line·1671·"trace/trace-hw_nvme.h"

1669

#line·1671·"trace/trace-hw_nvme.h"

1670

········}

1670

········}

1671

····}

1671

····}

1672

}

1672

}

1673

static·inline·void·trace_pci_nvme_block_status(int64_t·offset,·int64_t·bytes,·int64_t·pnum,·int·ret,·bool·zeroed)

1673

static·inline·void·trace_pci_nvme_block_status(int64_t·offset,·int64_t·bytes,·int64_t·pnum,·int·ret,·bool·zeroed)

1685

static·inline·void·_nocheck__trace_pci_nvme_dsm(uint32_t·nr,·uint32_t·attr)

1685

static·inline·void·_nocheck__trace_pci_nvme_dsm(uint32_t·nr,·uint32_t·attr)

1686

{

1686

{

1687

····if·(trace_event_get_state(TRACE_PCI_NVME_DSM)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1687

····if·(trace_event_get_state(TRACE_PCI_NVME_DSM)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1688

········if·(message_with_timestamp)·{

1688

········if·(message_with_timestamp)·{

1689

············struct·timeval·_now;

1689

············struct·timeval·_now;

1690

············gettimeofday(&_now,·NULL);

1690

············gettimeofday(&_now,·NULL);

1692

············qemu_log("%d@%zu.%06zu:pci_nvme_dsm·"·"nr·%"PRIu32"·attr·0x%"PRIx32""·"\n",

1692

············qemu_log("%d@%zu.%06zu:pci_nvme_dsm·"·"nr·%"PRIu32"·attr·0x%"PRIx32""·"\n",

1693

·····················qemu_get_thread_id(),

1693

·····················qemu_get_thread_id(),

1694

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1694

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1695

·····················,·nr,·attr);

1695

·····················,·nr,·attr);

1696

#line·1698·"trace/trace-hw_nvme.h"

1696

#line·1698·"trace/trace-hw_nvme.h"

1697

········}·else·{

1697

········}·else·{

1699

············qemu_log("pci_nvme_dsm·"·"nr·%"PRIu32"·attr·0x%"PRIx32""·"\n",·nr,·attr);

1699

············qemu_log("pci_nvme_dsm·"·"nr·%"PRIu32"·attr·0x%"PRIx32""·"\n",·nr,·attr);

1700

#line·1702·"trace/trace-hw_nvme.h"

1700

#line·1702·"trace/trace-hw_nvme.h"

1701

········}

1701

········}

1702

····}

1702

····}

1703

}

1703

}

1704

static·inline·void·trace_pci_nvme_dsm(uint32_t·nr,·uint32_t·attr)

1704

static·inline·void·trace_pci_nvme_dsm(uint32_t·nr,·uint32_t·attr)

1716

static·inline·void·_nocheck__trace_pci_nvme_dsm_deallocate(uint64_t·slba,·uint32_t·nlb)

1716

static·inline·void·_nocheck__trace_pci_nvme_dsm_deallocate(uint64_t·slba,·uint32_t·nlb)

1717

{

1717

{

1718

····if·(trace_event_get_state(TRACE_PCI_NVME_DSM_DEALLOCATE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1718

····if·(trace_event_get_state(TRACE_PCI_NVME_DSM_DEALLOCATE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1719

········if·(message_with_timestamp)·{

1719

········if·(message_with_timestamp)·{

1720

············struct·timeval·_now;

1720

············struct·timeval·_now;

1721

············gettimeofday(&_now,·NULL);

1721

············gettimeofday(&_now,·NULL);

1723

············qemu_log("%d@%zu.%06zu:pci_nvme_dsm_deallocate·"·"slba·%"PRIu64"·nlb·%"PRIu32""·"\n",

1723

············qemu_log("%d@%zu.%06zu:pci_nvme_dsm_deallocate·"·"slba·%"PRIu64"·nlb·%"PRIu32""·"\n",

1724

·····················qemu_get_thread_id(),

1724

·····················qemu_get_thread_id(),

1725

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1725

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1726

·····················,·slba,·nlb);

1726

·····················,·slba,·nlb);

1727

#line·1729·"trace/trace-hw_nvme.h"

1727

#line·1729·"trace/trace-hw_nvme.h"

1728

········}·else·{

1728

········}·else·{

1730

············qemu_log("pci_nvme_dsm_deallocate·"·"slba·%"PRIu64"·nlb·%"PRIu32""·"\n",·slba,·nlb);

1730

············qemu_log("pci_nvme_dsm_deallocate·"·"slba·%"PRIu64"·nlb·%"PRIu32""·"\n",·slba,·nlb);

1731

#line·1733·"trace/trace-hw_nvme.h"

1731

#line·1733·"trace/trace-hw_nvme.h"

1732

········}

1732

········}

1733

····}

1733

····}

1734

}

1734

}

1735

static·inline·void·trace_pci_nvme_dsm_deallocate(uint64_t·slba,·uint32_t·nlb)

1735

static·inline·void·trace_pci_nvme_dsm_deallocate(uint64_t·slba,·uint32_t·nlb)

1747

static·inline·void·_nocheck__trace_pci_nvme_dsm_single_range_limit_exceeded(uint32_t·nlb,·uint32_t·dmrsl)

1747

static·inline·void·_nocheck__trace_pci_nvme_dsm_single_range_limit_exceeded(uint32_t·nlb,·uint32_t·dmrsl)

1748

{

1748

{

1749

····if·(trace_event_get_state(TRACE_PCI_NVME_DSM_SINGLE_RANGE_LIMIT_EXCEEDED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1749

····if·(trace_event_get_state(TRACE_PCI_NVME_DSM_SINGLE_RANGE_LIMIT_EXCEEDED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1750

········if·(message_with_timestamp)·{

1750

········if·(message_with_timestamp)·{

1751

············struct·timeval·_now;

1751

············struct·timeval·_now;

1752

············gettimeofday(&_now,·NULL);

1752

············gettimeofday(&_now,·NULL);

1754

············qemu_log("%d@%zu.%06zu:pci_nvme_dsm_single_range_limit_exceeded·"·"nlb·%"PRIu32"·dmrsl·%"PRIu32""·"\n",

1754

············qemu_log("%d@%zu.%06zu:pci_nvme_dsm_single_range_limit_exceeded·"·"nlb·%"PRIu32"·dmrsl·%"PRIu32""·"\n",

1755

·····················qemu_get_thread_id(),

1755

·····················qemu_get_thread_id(),

1756

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1756

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1757

·····················,·nlb,·dmrsl);

1757

·····················,·nlb,·dmrsl);

1758

#line·1760·"trace/trace-hw_nvme.h"

1758

#line·1760·"trace/trace-hw_nvme.h"

1759

········}·else·{

1759

········}·else·{

1761

············qemu_log("pci_nvme_dsm_single_range_limit_exceeded·"·"nlb·%"PRIu32"·dmrsl·%"PRIu32""·"\n",·nlb,·dmrsl);

1761

············qemu_log("pci_nvme_dsm_single_range_limit_exceeded·"·"nlb·%"PRIu32"·dmrsl·%"PRIu32""·"\n",·nlb,·dmrsl);

1762

#line·1764·"trace/trace-hw_nvme.h"

1762

#line·1764·"trace/trace-hw_nvme.h"

1763

········}

1763

········}

1764

····}

1764

····}

1765

}

1765

}

1766

static·inline·void·trace_pci_nvme_dsm_single_range_limit_exceeded(uint32_t·nlb,·uint32_t·dmrsl)

1766

static·inline·void·trace_pci_nvme_dsm_single_range_limit_exceeded(uint32_t·nlb,·uint32_t·dmrsl)

1778

static·inline·void·_nocheck__trace_pci_nvme_compare(uint16_t·cid,·uint32_t·nsid,·uint64_t·slba,·uint32_t·nlb)

1778

static·inline·void·_nocheck__trace_pci_nvme_compare(uint16_t·cid,·uint32_t·nsid,·uint64_t·slba,·uint32_t·nlb)

1779

{

1779

{

1780

····if·(trace_event_get_state(TRACE_PCI_NVME_COMPARE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1780

····if·(trace_event_get_state(TRACE_PCI_NVME_COMPARE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1781

········if·(message_with_timestamp)·{

1781

········if·(message_with_timestamp)·{

1782

············struct·timeval·_now;

1782

············struct·timeval·_now;

1783

············gettimeofday(&_now,·NULL);

1783

············gettimeofday(&_now,·NULL);

1785

············qemu_log("%d@%zu.%06zu:pci_nvme_compare·"·"cid·%"PRIu16"·nsid·%"PRIu32"·slba·0x%"PRIx64"·nlb·%"PRIu32""·"\n",

1785

············qemu_log("%d@%zu.%06zu:pci_nvme_compare·"·"cid·%"PRIu16"·nsid·%"PRIu32"·slba·0x%"PRIx64"·nlb·%"PRIu32""·"\n",

1786

·····················qemu_get_thread_id(),

1786

·····················qemu_get_thread_id(),

1787

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1787

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1788

·····················,·cid,·nsid,·slba,·nlb);

1788

·····················,·cid,·nsid,·slba,·nlb);

1789

#line·1791·"trace/trace-hw_nvme.h"

1789

#line·1791·"trace/trace-hw_nvme.h"

1790

········}·else·{

1790

········}·else·{

1792

············qemu_log("pci_nvme_compare·"·"cid·%"PRIu16"·nsid·%"PRIu32"·slba·0x%"PRIx64"·nlb·%"PRIu32""·"\n",·cid,·nsid,·slba,·nlb);

1792

············qemu_log("pci_nvme_compare·"·"cid·%"PRIu16"·nsid·%"PRIu32"·slba·0x%"PRIx64"·nlb·%"PRIu32""·"\n",·cid,·nsid,·slba,·nlb);

1793

#line·1795·"trace/trace-hw_nvme.h"

1793

#line·1795·"trace/trace-hw_nvme.h"

1794

········}

1794

········}

1795

····}

1795

····}

1796

}

1796

}

1797

static·inline·void·trace_pci_nvme_compare(uint16_t·cid,·uint32_t·nsid,·uint64_t·slba,·uint32_t·nlb)

1797

static·inline·void·trace_pci_nvme_compare(uint16_t·cid,·uint32_t·nsid,·uint64_t·slba,·uint32_t·nlb)

1809

static·inline·void·_nocheck__trace_pci_nvme_compare_data_cb(uint16_t·cid)

1809

static·inline·void·_nocheck__trace_pci_nvme_compare_data_cb(uint16_t·cid)

1810

{

1810

{

1811

····if·(trace_event_get_state(TRACE_PCI_NVME_COMPARE_DATA_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1811

····if·(trace_event_get_state(TRACE_PCI_NVME_COMPARE_DATA_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1812

········if·(message_with_timestamp)·{

1812

········if·(message_with_timestamp)·{

1813

············struct·timeval·_now;

1813

············struct·timeval·_now;

1814

············gettimeofday(&_now,·NULL);

1814

············gettimeofday(&_now,·NULL);

1816

············qemu_log("%d@%zu.%06zu:pci_nvme_compare_data_cb·"·"cid·%"PRIu16""·"\n",

1816

············qemu_log("%d@%zu.%06zu:pci_nvme_compare_data_cb·"·"cid·%"PRIu16""·"\n",

1817

·····················qemu_get_thread_id(),

1817

·····················qemu_get_thread_id(),

1818

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1818

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1819

·····················,·cid);

1819

·····················,·cid);

1820

#line·1822·"trace/trace-hw_nvme.h"

1820

#line·1822·"trace/trace-hw_nvme.h"

1821

········}·else·{

1821

········}·else·{

1823

············qemu_log("pci_nvme_compare_data_cb·"·"cid·%"PRIu16""·"\n",·cid);

1823

············qemu_log("pci_nvme_compare_data_cb·"·"cid·%"PRIu16""·"\n",·cid);

1824

#line·1826·"trace/trace-hw_nvme.h"

1824

#line·1826·"trace/trace-hw_nvme.h"

1825

········}

1825

········}

1826

····}

1826

····}

1827

}

1827

}

1828

static·inline·void·trace_pci_nvme_compare_data_cb(uint16_t·cid)

1828

static·inline·void·trace_pci_nvme_compare_data_cb(uint16_t·cid)

1840

static·inline·void·_nocheck__trace_pci_nvme_compare_mdata_cb(uint16_t·cid)

1840

static·inline·void·_nocheck__trace_pci_nvme_compare_mdata_cb(uint16_t·cid)

1841

{

1841

{

1842

····if·(trace_event_get_state(TRACE_PCI_NVME_COMPARE_MDATA_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1842

····if·(trace_event_get_state(TRACE_PCI_NVME_COMPARE_MDATA_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1843

········if·(message_with_timestamp)·{

1843

········if·(message_with_timestamp)·{

1844

············struct·timeval·_now;

1844

············struct·timeval·_now;

1845

············gettimeofday(&_now,·NULL);

1845

············gettimeofday(&_now,·NULL);

1847

············qemu_log("%d@%zu.%06zu:pci_nvme_compare_mdata_cb·"·"cid·%"PRIu16""·"\n",

1847

············qemu_log("%d@%zu.%06zu:pci_nvme_compare_mdata_cb·"·"cid·%"PRIu16""·"\n",

1848

·····················qemu_get_thread_id(),

1848

·····················qemu_get_thread_id(),

1849

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1849

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1850

·····················,·cid);

1850

·····················,·cid);

1851

#line·1853·"trace/trace-hw_nvme.h"

1851

#line·1853·"trace/trace-hw_nvme.h"

1852

········}·else·{

1852

········}·else·{

1854

············qemu_log("pci_nvme_compare_mdata_cb·"·"cid·%"PRIu16""·"\n",·cid);

1854

············qemu_log("pci_nvme_compare_mdata_cb·"·"cid·%"PRIu16""·"\n",·cid);

1855

#line·1857·"trace/trace-hw_nvme.h"

1855

#line·1857·"trace/trace-hw_nvme.h"

1856

········}

1856

········}

1857

····}

1857

····}

1858

}

1858

}

1859

static·inline·void·trace_pci_nvme_compare_mdata_cb(uint16_t·cid)

1859

static·inline·void·trace_pci_nvme_compare_mdata_cb(uint16_t·cid)

1871

static·inline·void·_nocheck__trace_pci_nvme_aio_discard_cb(uint16_t·cid)

1871

static·inline·void·_nocheck__trace_pci_nvme_aio_discard_cb(uint16_t·cid)

1872

{

1872

{

1873

····if·(trace_event_get_state(TRACE_PCI_NVME_AIO_DISCARD_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1873

····if·(trace_event_get_state(TRACE_PCI_NVME_AIO_DISCARD_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1874

········if·(message_with_timestamp)·{

1874

········if·(message_with_timestamp)·{

1875

············struct·timeval·_now;

1875

············struct·timeval·_now;

1876

············gettimeofday(&_now,·NULL);

1876

············gettimeofday(&_now,·NULL);

1878

············qemu_log("%d@%zu.%06zu:pci_nvme_aio_discard_cb·"·"cid·%"PRIu16""·"\n",

1878

············qemu_log("%d@%zu.%06zu:pci_nvme_aio_discard_cb·"·"cid·%"PRIu16""·"\n",

1879

·····················qemu_get_thread_id(),

1879

·····················qemu_get_thread_id(),

1880

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1880

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1881

·····················,·cid);

1881

·····················,·cid);

1882

#line·1884·"trace/trace-hw_nvme.h"

1882

#line·1884·"trace/trace-hw_nvme.h"

1883

········}·else·{

1883

········}·else·{

1885

············qemu_log("pci_nvme_aio_discard_cb·"·"cid·%"PRIu16""·"\n",·cid);

1885

············qemu_log("pci_nvme_aio_discard_cb·"·"cid·%"PRIu16""·"\n",·cid);

1886

#line·1888·"trace/trace-hw_nvme.h"

1886

#line·1888·"trace/trace-hw_nvme.h"

1887

········}

1887

········}

1888

····}

1888

····}

1889

}

1889

}

1890

static·inline·void·trace_pci_nvme_aio_discard_cb(uint16_t·cid)

1890

static·inline·void·trace_pci_nvme_aio_discard_cb(uint16_t·cid)

1902

static·inline·void·_nocheck__trace_pci_nvme_aio_copy_in_cb(uint16_t·cid)

1902

static·inline·void·_nocheck__trace_pci_nvme_aio_copy_in_cb(uint16_t·cid)

1903

{

1903

{

1904

····if·(trace_event_get_state(TRACE_PCI_NVME_AIO_COPY_IN_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1904

····if·(trace_event_get_state(TRACE_PCI_NVME_AIO_COPY_IN_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1905

········if·(message_with_timestamp)·{

1905

········if·(message_with_timestamp)·{

1906

············struct·timeval·_now;

1906

············struct·timeval·_now;

1907

············gettimeofday(&_now,·NULL);

1907

············gettimeofday(&_now,·NULL);

1909

············qemu_log("%d@%zu.%06zu:pci_nvme_aio_copy_in_cb·"·"cid·%"PRIu16""·"\n",

1909

············qemu_log("%d@%zu.%06zu:pci_nvme_aio_copy_in_cb·"·"cid·%"PRIu16""·"\n",

1910

·····················qemu_get_thread_id(),

1910

·····················qemu_get_thread_id(),

1911

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1911

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1912

·····················,·cid);

1912

·····················,·cid);

1913

#line·1915·"trace/trace-hw_nvme.h"

1913

#line·1915·"trace/trace-hw_nvme.h"

1914

········}·else·{

1914

········}·else·{

1916

············qemu_log("pci_nvme_aio_copy_in_cb·"·"cid·%"PRIu16""·"\n",·cid);

1916

············qemu_log("pci_nvme_aio_copy_in_cb·"·"cid·%"PRIu16""·"\n",·cid);

1917

#line·1919·"trace/trace-hw_nvme.h"

1917

#line·1919·"trace/trace-hw_nvme.h"

1918

········}

1918

········}

1919

····}

1919

····}

1920

}

1920

}

1921

static·inline·void·trace_pci_nvme_aio_copy_in_cb(uint16_t·cid)

1921

static·inline·void·trace_pci_nvme_aio_copy_in_cb(uint16_t·cid)

1933

static·inline·void·_nocheck__trace_pci_nvme_aio_flush_cb(uint16_t·cid,·const·char·*·blkname)

1933

static·inline·void·_nocheck__trace_pci_nvme_aio_flush_cb(uint16_t·cid,·const·char·*·blkname)

1934

{

1934

{

1935

····if·(trace_event_get_state(TRACE_PCI_NVME_AIO_FLUSH_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1935

····if·(trace_event_get_state(TRACE_PCI_NVME_AIO_FLUSH_CB)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1936

········if·(message_with_timestamp)·{

1936

········if·(message_with_timestamp)·{

1937

············struct·timeval·_now;

1937

············struct·timeval·_now;

1938

············gettimeofday(&_now,·NULL);

1938

············gettimeofday(&_now,·NULL);

1940

············qemu_log("%d@%zu.%06zu:pci_nvme_aio_flush_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",

1940

············qemu_log("%d@%zu.%06zu:pci_nvme_aio_flush_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",

1941

·····················qemu_get_thread_id(),

1941

·····················qemu_get_thread_id(),

1942

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1942

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1943

·····················,·cid,·blkname);

1943

·····················,·cid,·blkname);

1944

#line·1946·"trace/trace-hw_nvme.h"

1944

#line·1946·"trace/trace-hw_nvme.h"

1945

········}·else·{

1945

········}·else·{

1947

············qemu_log("pci_nvme_aio_flush_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",·cid,·blkname);

1947

············qemu_log("pci_nvme_aio_flush_cb·"·"cid·%"PRIu16"·blk·'%s'"·"\n",·cid,·blkname);

1948

#line·1950·"trace/trace-hw_nvme.h"

1948

#line·1950·"trace/trace-hw_nvme.h"

1949

········}

1949

········}

1950

····}

1950

····}

1951

}

1951

}

1952

static·inline·void·trace_pci_nvme_aio_flush_cb(uint16_t·cid,·const·char·*·blkname)

1952

static·inline·void·trace_pci_nvme_aio_flush_cb(uint16_t·cid,·const·char·*·blkname)

1964

static·inline·void·_nocheck__trace_pci_nvme_create_sq(uint64_t·addr,·uint16_t·sqid,·uint16_t·cqid,·uint16_t·qsize,·uint16_t·qflags)

1964

static·inline·void·_nocheck__trace_pci_nvme_create_sq(uint64_t·addr,·uint16_t·sqid,·uint16_t·cqid,·uint16_t·qsize,·uint16_t·qflags)

1965

{

1965

{

1966

····if·(trace_event_get_state(TRACE_PCI_NVME_CREATE_SQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1966

····if·(trace_event_get_state(TRACE_PCI_NVME_CREATE_SQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1967

········if·(message_with_timestamp)·{

1967

········if·(message_with_timestamp)·{

1968

············struct·timeval·_now;

1968

············struct·timeval·_now;

1969

············gettimeofday(&_now,·NULL);

1969

············gettimeofday(&_now,·NULL);

1971

············qemu_log("%d@%zu.%06zu:pci_nvme_create_sq·"·"create·submission·queue,·addr=0x%"PRIx64",·sqid=%"PRIu16",·cqid=%"PRIu16",·qsize=%"PRIu16",·qflags=%"PRIu16""·"\n",

1971

············qemu_log("%d@%zu.%06zu:pci_nvme_create_sq·"·"create·submission·queue,·addr=0x%"PRIx64",·sqid=%"PRIu16",·cqid=%"PRIu16",·qsize=%"PRIu16",·qflags=%"PRIu16""·"\n",

1972

·····················qemu_get_thread_id(),

1972

·····················qemu_get_thread_id(),

1973

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1973

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

1974

·····················,·addr,·sqid,·cqid,·qsize,·qflags);

1974

·····················,·addr,·sqid,·cqid,·qsize,·qflags);

1975

#line·1977·"trace/trace-hw_nvme.h"

1975

#line·1977·"trace/trace-hw_nvme.h"

1976

········}·else·{

1976

········}·else·{

1978

············qemu_log("pci_nvme_create_sq·"·"create·submission·queue,·addr=0x%"PRIx64",·sqid=%"PRIu16",·cqid=%"PRIu16",·qsize=%"PRIu16",·qflags=%"PRIu16""·"\n",·addr,·sqid,·cqid,·qsize,·qflags);

1978

············qemu_log("pci_nvme_create_sq·"·"create·submission·queue,·addr=0x%"PRIx64",·sqid=%"PRIu16",·cqid=%"PRIu16",·qsize=%"PRIu16",·qflags=%"PRIu16""·"\n",·addr,·sqid,·cqid,·qsize,·qflags);

1979

#line·1981·"trace/trace-hw_nvme.h"

1979

#line·1981·"trace/trace-hw_nvme.h"

1980

········}

1980

········}

1981

····}

1981

····}

1982

}

1982

}

1983

static·inline·void·trace_pci_nvme_create_sq(uint64_t·addr,·uint16_t·sqid,·uint16_t·cqid,·uint16_t·qsize,·uint16_t·qflags)

1983

static·inline·void·trace_pci_nvme_create_sq(uint64_t·addr,·uint16_t·sqid,·uint16_t·cqid,·uint16_t·qsize,·uint16_t·qflags)

1995

static·inline·void·_nocheck__trace_pci_nvme_create_cq(uint64_t·addr,·uint16_t·cqid,·uint16_t·vector,·uint16_t·size,·uint16_t·qflags,·int·ien)

1995

static·inline·void·_nocheck__trace_pci_nvme_create_cq(uint64_t·addr,·uint16_t·cqid,·uint16_t·vector,·uint16_t·size,·uint16_t·qflags,·int·ien)

1996

{

1996

{

1997

····if·(trace_event_get_state(TRACE_PCI_NVME_CREATE_CQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1997

····if·(trace_event_get_state(TRACE_PCI_NVME_CREATE_CQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

1998

········if·(message_with_timestamp)·{

1998

········if·(message_with_timestamp)·{

1999

············struct·timeval·_now;

1999

············struct·timeval·_now;

2000

············gettimeofday(&_now,·NULL);

2000

············gettimeofday(&_now,·NULL);

2002

············qemu_log("%d@%zu.%06zu:pci_nvme_create_cq·"·"create·completion·queue,·addr=0x%"PRIx64",·cqid=%"PRIu16",·vector=%"PRIu16",·qsize=%"PRIu16",·qflags=%"PRIu16",·ien=%d"·"\n",

2002

············qemu_log("%d@%zu.%06zu:pci_nvme_create_cq·"·"create·completion·queue,·addr=0x%"PRIx64",·cqid=%"PRIu16",·vector=%"PRIu16",·qsize=%"PRIu16",·qflags=%"PRIu16",·ien=%d"·"\n",

2003

·····················qemu_get_thread_id(),

2003

·····················qemu_get_thread_id(),

2004

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2004

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2005

·····················,·addr,·cqid,·vector,·size,·qflags,·ien);

2005

·····················,·addr,·cqid,·vector,·size,·qflags,·ien);

2006

#line·2008·"trace/trace-hw_nvme.h"

2006

#line·2008·"trace/trace-hw_nvme.h"

2007

········}·else·{

2007

········}·else·{

2009

············qemu_log("pci_nvme_create_cq·"·"create·completion·queue,·addr=0x%"PRIx64",·cqid=%"PRIu16",·vector=%"PRIu16",·qsize=%"PRIu16",·qflags=%"PRIu16",·ien=%d"·"\n",·addr,·cqid,·vector,·size,·qflags,·ien);

2009

············qemu_log("pci_nvme_create_cq·"·"create·completion·queue,·addr=0x%"PRIx64",·cqid=%"PRIu16",·vector=%"PRIu16",·qsize=%"PRIu16",·qflags=%"PRIu16",·ien=%d"·"\n",·addr,·cqid,·vector,·size,·qflags,·ien);

2010

#line·2012·"trace/trace-hw_nvme.h"

2010

#line·2012·"trace/trace-hw_nvme.h"

2011

········}

2011

········}

2012

····}

2012

····}

2013

}

2013

}

2014

static·inline·void·trace_pci_nvme_create_cq(uint64_t·addr,·uint16_t·cqid,·uint16_t·vector,·uint16_t·size,·uint16_t·qflags,·int·ien)

2014

static·inline·void·trace_pci_nvme_create_cq(uint64_t·addr,·uint16_t·cqid,·uint16_t·vector,·uint16_t·size,·uint16_t·qflags,·int·ien)

2026

static·inline·void·_nocheck__trace_pci_nvme_del_sq(uint16_t·qid)

2026

static·inline·void·_nocheck__trace_pci_nvme_del_sq(uint16_t·qid)

2027

{

2027

{

2028

····if·(trace_event_get_state(TRACE_PCI_NVME_DEL_SQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2028

····if·(trace_event_get_state(TRACE_PCI_NVME_DEL_SQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2029

········if·(message_with_timestamp)·{

2029

········if·(message_with_timestamp)·{

2030

············struct·timeval·_now;

2030

············struct·timeval·_now;

2031

············gettimeofday(&_now,·NULL);

2031

············gettimeofday(&_now,·NULL);

2033

············qemu_log("%d@%zu.%06zu:pci_nvme_del_sq·"·"deleting·submission·queue·sqid=%"PRIu16""·"\n",

2033

············qemu_log("%d@%zu.%06zu:pci_nvme_del_sq·"·"deleting·submission·queue·sqid=%"PRIu16""·"\n",

2034

·····················qemu_get_thread_id(),

2034

·····················qemu_get_thread_id(),

2035

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2035

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2036

·····················,·qid);

2036

·····················,·qid);

2037

#line·2039·"trace/trace-hw_nvme.h"

2037

#line·2039·"trace/trace-hw_nvme.h"

2038

········}·else·{

2038

········}·else·{

2040

············qemu_log("pci_nvme_del_sq·"·"deleting·submission·queue·sqid=%"PRIu16""·"\n",·qid);

2040

············qemu_log("pci_nvme_del_sq·"·"deleting·submission·queue·sqid=%"PRIu16""·"\n",·qid);

2041

#line·2043·"trace/trace-hw_nvme.h"

2041

#line·2043·"trace/trace-hw_nvme.h"

2042

········}

2042

········}

2043

····}

2043

····}

2044

}

2044

}

2045

static·inline·void·trace_pci_nvme_del_sq(uint16_t·qid)

2045

static·inline·void·trace_pci_nvme_del_sq(uint16_t·qid)

2057

static·inline·void·_nocheck__trace_pci_nvme_del_cq(uint16_t·cqid)

2057

static·inline·void·_nocheck__trace_pci_nvme_del_cq(uint16_t·cqid)

2058

{

2058

{

2059

····if·(trace_event_get_state(TRACE_PCI_NVME_DEL_CQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2059

····if·(trace_event_get_state(TRACE_PCI_NVME_DEL_CQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2060

········if·(message_with_timestamp)·{

2060

········if·(message_with_timestamp)·{

2061

············struct·timeval·_now;

2061

············struct·timeval·_now;

2062

············gettimeofday(&_now,·NULL);

2062

············gettimeofday(&_now,·NULL);

2064

············qemu_log("%d@%zu.%06zu:pci_nvme_del_cq·"·"deleted·completion·queue,·cqid=%"PRIu16""·"\n",

2064

············qemu_log("%d@%zu.%06zu:pci_nvme_del_cq·"·"deleted·completion·queue,·cqid=%"PRIu16""·"\n",

2065

·····················qemu_get_thread_id(),

2065

·····················qemu_get_thread_id(),

2066

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2066

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2067

·····················,·cqid);

2067

·····················,·cqid);

2068

#line·2070·"trace/trace-hw_nvme.h"

2068

#line·2070·"trace/trace-hw_nvme.h"

2069

········}·else·{

2069

········}·else·{

2071

············qemu_log("pci_nvme_del_cq·"·"deleted·completion·queue,·cqid=%"PRIu16""·"\n",·cqid);

2071

············qemu_log("pci_nvme_del_cq·"·"deleted·completion·queue,·cqid=%"PRIu16""·"\n",·cqid);

2072

#line·2074·"trace/trace-hw_nvme.h"

2072

#line·2074·"trace/trace-hw_nvme.h"

2073

········}

2073

········}

2074

····}

2074

····}

2075

}

2075

}

2076

static·inline·void·trace_pci_nvme_del_cq(uint16_t·cqid)

2076

static·inline·void·trace_pci_nvme_del_cq(uint16_t·cqid)

2088

static·inline·void·_nocheck__trace_pci_nvme_identify(uint16_t·cid,·uint8_t·cns,·uint16_t·ctrlid,·uint8_t·csi)

2088

static·inline·void·_nocheck__trace_pci_nvme_identify(uint16_t·cid,·uint8_t·cns,·uint16_t·ctrlid,·uint8_t·csi)

2089

{

2089

{

2090

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2090

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2091

········if·(message_with_timestamp)·{

2091

········if·(message_with_timestamp)·{

2092

············struct·timeval·_now;

2092

············struct·timeval·_now;

2093

············gettimeofday(&_now,·NULL);

2093

············gettimeofday(&_now,·NULL);

2095

············qemu_log("%d@%zu.%06zu:pci_nvme_identify·"·"cid·%"PRIu16"·cns·0x%"PRIx8"·ctrlid·%"PRIu16"·csi·0x%"PRIx8""·"\n",

2095

············qemu_log("%d@%zu.%06zu:pci_nvme_identify·"·"cid·%"PRIu16"·cns·0x%"PRIx8"·ctrlid·%"PRIu16"·csi·0x%"PRIx8""·"\n",

2096

·····················qemu_get_thread_id(),

2096

·····················qemu_get_thread_id(),

2097

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2097

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2098

·····················,·cid,·cns,·ctrlid,·csi);

2098

·····················,·cid,·cns,·ctrlid,·csi);

2099

#line·2101·"trace/trace-hw_nvme.h"

2099

#line·2101·"trace/trace-hw_nvme.h"

2100

········}·else·{

2100

········}·else·{

2102

············qemu_log("pci_nvme_identify·"·"cid·%"PRIu16"·cns·0x%"PRIx8"·ctrlid·%"PRIu16"·csi·0x%"PRIx8""·"\n",·cid,·cns,·ctrlid,·csi);

2102

············qemu_log("pci_nvme_identify·"·"cid·%"PRIu16"·cns·0x%"PRIx8"·ctrlid·%"PRIu16"·csi·0x%"PRIx8""·"\n",·cid,·cns,·ctrlid,·csi);

2103

#line·2105·"trace/trace-hw_nvme.h"

2103

#line·2105·"trace/trace-hw_nvme.h"

2104

········}

2104

········}

2105

····}

2105

····}

2106

}

2106

}

2107

static·inline·void·trace_pci_nvme_identify(uint16_t·cid,·uint8_t·cns,·uint16_t·ctrlid,·uint8_t·csi)

2107

static·inline·void·trace_pci_nvme_identify(uint16_t·cid,·uint8_t·cns,·uint16_t·ctrlid,·uint8_t·csi)

2119

static·inline·void·_nocheck__trace_pci_nvme_identify_ctrl(void)

2119

static·inline·void·_nocheck__trace_pci_nvme_identify_ctrl(void)

2120

{

2120

{

2121

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_CTRL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2121

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_CTRL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2122

········if·(message_with_timestamp)·{

2122

········if·(message_with_timestamp)·{

2123

············struct·timeval·_now;

2123

············struct·timeval·_now;

2124

············gettimeofday(&_now,·NULL);

2124

············gettimeofday(&_now,·NULL);

2126

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_ctrl·"·"identify·controller"·"\n",

2126

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_ctrl·"·"identify·controller"·"\n",

2127

·····················qemu_get_thread_id(),

2127

·····················qemu_get_thread_id(),

2128

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2128

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2129

·····················);

2129

·····················);

2130

#line·2132·"trace/trace-hw_nvme.h"

2130

#line·2132·"trace/trace-hw_nvme.h"

2131

········}·else·{

2131

········}·else·{

2133

············qemu_log("pci_nvme_identify_ctrl·"·"identify·controller"·"\n");

2133

············qemu_log("pci_nvme_identify_ctrl·"·"identify·controller"·"\n");

2134

#line·2136·"trace/trace-hw_nvme.h"

2134

#line·2136·"trace/trace-hw_nvme.h"

2135

········}

2135

········}

2136

····}

2136

····}

2137

}

2137

}

2138

static·inline·void·trace_pci_nvme_identify_ctrl(void)

2138

static·inline·void·trace_pci_nvme_identify_ctrl(void)

2150

static·inline·void·_nocheck__trace_pci_nvme_identify_ctrl_csi(uint8_t·csi)

2150

static·inline·void·_nocheck__trace_pci_nvme_identify_ctrl_csi(uint8_t·csi)

2151

{

2151

{

2152

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_CTRL_CSI)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2152

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_CTRL_CSI)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2153

········if·(message_with_timestamp)·{

2153

········if·(message_with_timestamp)·{

2154

············struct·timeval·_now;

2154

············struct·timeval·_now;

2155

············gettimeofday(&_now,·NULL);

2155

············gettimeofday(&_now,·NULL);

2157

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_ctrl_csi·"·"identify·controller,·csi=0x%"PRIx8""·"\n",

2157

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_ctrl_csi·"·"identify·controller,·csi=0x%"PRIx8""·"\n",

2158

·····················qemu_get_thread_id(),

2158

·····················qemu_get_thread_id(),

2159

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2159

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2160

·····················,·csi);

2160

·····················,·csi);

2161

#line·2163·"trace/trace-hw_nvme.h"

2161

#line·2163·"trace/trace-hw_nvme.h"

2162

········}·else·{

2162

········}·else·{

2164

············qemu_log("pci_nvme_identify_ctrl_csi·"·"identify·controller,·csi=0x%"PRIx8""·"\n",·csi);

2164

············qemu_log("pci_nvme_identify_ctrl_csi·"·"identify·controller,·csi=0x%"PRIx8""·"\n",·csi);

2165

#line·2167·"trace/trace-hw_nvme.h"

2165

#line·2167·"trace/trace-hw_nvme.h"

2166

········}

2166

········}

2167

····}

2167

····}

2168

}

2168

}

2169

static·inline·void·trace_pci_nvme_identify_ctrl_csi(uint8_t·csi)

2169

static·inline·void·trace_pci_nvme_identify_ctrl_csi(uint8_t·csi)

2181

static·inline·void·_nocheck__trace_pci_nvme_identify_ns(uint32_t·ns)

2181

static·inline·void·_nocheck__trace_pci_nvme_identify_ns(uint32_t·ns)

2182

{

2182

{

2183

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_NS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2183

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_NS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2184

········if·(message_with_timestamp)·{

2184

········if·(message_with_timestamp)·{

2185

············struct·timeval·_now;

2185

············struct·timeval·_now;

2186

············gettimeofday(&_now,·NULL);

2186

············gettimeofday(&_now,·NULL);

2188

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_ns·"·"nsid·%"PRIu32""·"\n",

2188

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_ns·"·"nsid·%"PRIu32""·"\n",

2189

·····················qemu_get_thread_id(),

2189

·····················qemu_get_thread_id(),

2190

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2190

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2191

·····················,·ns);

2191

·····················,·ns);

2192

#line·2194·"trace/trace-hw_nvme.h"

2192

#line·2194·"trace/trace-hw_nvme.h"

2193

········}·else·{

2193

········}·else·{

2195

············qemu_log("pci_nvme_identify_ns·"·"nsid·%"PRIu32""·"\n",·ns);

2195

············qemu_log("pci_nvme_identify_ns·"·"nsid·%"PRIu32""·"\n",·ns);

2196

#line·2198·"trace/trace-hw_nvme.h"

2196

#line·2198·"trace/trace-hw_nvme.h"

2197

········}

2197

········}

2198

····}

2198

····}

2199

}

2199

}

2200

static·inline·void·trace_pci_nvme_identify_ns(uint32_t·ns)

2200

static·inline·void·trace_pci_nvme_identify_ns(uint32_t·ns)

2212

static·inline·void·_nocheck__trace_pci_nvme_identify_ctrl_list(uint8_t·cns,·uint16_t·cntid)

2212

static·inline·void·_nocheck__trace_pci_nvme_identify_ctrl_list(uint8_t·cns,·uint16_t·cntid)

2213

{

2213

{

2214

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_CTRL_LIST)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2214

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_CTRL_LIST)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2215

········if·(message_with_timestamp)·{

2215

········if·(message_with_timestamp)·{

2216

············struct·timeval·_now;

2216

············struct·timeval·_now;

2217

············gettimeofday(&_now,·NULL);

2217

············gettimeofday(&_now,·NULL);

2219

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_ctrl_list·"·"cns·0x%"PRIx8"·cntid·%"PRIu16""·"\n",

2219

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_ctrl_list·"·"cns·0x%"PRIx8"·cntid·%"PRIu16""·"\n",

2220

·····················qemu_get_thread_id(),

2220

·····················qemu_get_thread_id(),

2221

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2221

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2222

·····················,·cns,·cntid);

2222

·····················,·cns,·cntid);

2223

#line·2225·"trace/trace-hw_nvme.h"

2223

#line·2225·"trace/trace-hw_nvme.h"

2224

········}·else·{

2224

········}·else·{

2226

············qemu_log("pci_nvme_identify_ctrl_list·"·"cns·0x%"PRIx8"·cntid·%"PRIu16""·"\n",·cns,·cntid);

2226

············qemu_log("pci_nvme_identify_ctrl_list·"·"cns·0x%"PRIx8"·cntid·%"PRIu16""·"\n",·cns,·cntid);

2227

#line·2229·"trace/trace-hw_nvme.h"

2227

#line·2229·"trace/trace-hw_nvme.h"

2228

········}

2228

········}

2229

····}

2229

····}

2230

}

2230

}

2231

static·inline·void·trace_pci_nvme_identify_ctrl_list(uint8_t·cns,·uint16_t·cntid)

2231

static·inline·void·trace_pci_nvme_identify_ctrl_list(uint8_t·cns,·uint16_t·cntid)

2243

static·inline·void·_nocheck__trace_pci_nvme_identify_ns_csi(uint32_t·ns,·uint8_t·csi)

2243

static·inline·void·_nocheck__trace_pci_nvme_identify_ns_csi(uint32_t·ns,·uint8_t·csi)

2244

{

2244

{

2245

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_NS_CSI)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2245

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_NS_CSI)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2246

········if·(message_with_timestamp)·{

2246

········if·(message_with_timestamp)·{

2247

············struct·timeval·_now;

2247

············struct·timeval·_now;

2248

············gettimeofday(&_now,·NULL);

2248

············gettimeofday(&_now,·NULL);

2250

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_ns_csi·"·"nsid=%"PRIu32",·csi=0x%"PRIx8""·"\n",

2250

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_ns_csi·"·"nsid=%"PRIu32",·csi=0x%"PRIx8""·"\n",

2251

·····················qemu_get_thread_id(),

2251

·····················qemu_get_thread_id(),

2252

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2252

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2253

·····················,·ns,·csi);

2253

·····················,·ns,·csi);

2254

#line·2256·"trace/trace-hw_nvme.h"

2254

#line·2256·"trace/trace-hw_nvme.h"

2255

········}·else·{

2255

········}·else·{

2257

············qemu_log("pci_nvme_identify_ns_csi·"·"nsid=%"PRIu32",·csi=0x%"PRIx8""·"\n",·ns,·csi);

2257

············qemu_log("pci_nvme_identify_ns_csi·"·"nsid=%"PRIu32",·csi=0x%"PRIx8""·"\n",·ns,·csi);

2258

#line·2260·"trace/trace-hw_nvme.h"

2258

#line·2260·"trace/trace-hw_nvme.h"

2259

········}

2259

········}

2260

····}

2260

····}

2261

}

2261

}

2262

static·inline·void·trace_pci_nvme_identify_ns_csi(uint32_t·ns,·uint8_t·csi)

2262

static·inline·void·trace_pci_nvme_identify_ns_csi(uint32_t·ns,·uint8_t·csi)

2274

static·inline·void·_nocheck__trace_pci_nvme_identify_nslist(uint32_t·ns)

2274

static·inline·void·_nocheck__trace_pci_nvme_identify_nslist(uint32_t·ns)

2275

{

2275

{

2276

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_NSLIST)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2276

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_NSLIST)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2277

········if·(message_with_timestamp)·{

2277

········if·(message_with_timestamp)·{

2278

············struct·timeval·_now;

2278

············struct·timeval·_now;

2279

············gettimeofday(&_now,·NULL);

2279

············gettimeofday(&_now,·NULL);

2281

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_nslist·"·"nsid·%"PRIu32""·"\n",

2281

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_nslist·"·"nsid·%"PRIu32""·"\n",

2282

·····················qemu_get_thread_id(),

2282

·····················qemu_get_thread_id(),

2283

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2283

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2284

·····················,·ns);

2284

·····················,·ns);

2285

#line·2287·"trace/trace-hw_nvme.h"

2285

#line·2287·"trace/trace-hw_nvme.h"

2286

········}·else·{

2286

········}·else·{

2288

············qemu_log("pci_nvme_identify_nslist·"·"nsid·%"PRIu32""·"\n",·ns);

2288

············qemu_log("pci_nvme_identify_nslist·"·"nsid·%"PRIu32""·"\n",·ns);

2289

#line·2291·"trace/trace-hw_nvme.h"

2289

#line·2291·"trace/trace-hw_nvme.h"

2290

········}

2290

········}

2291

····}

2291

····}

2292

}

2292

}

2293

static·inline·void·trace_pci_nvme_identify_nslist(uint32_t·ns)

2293

static·inline·void·trace_pci_nvme_identify_nslist(uint32_t·ns)

2305

static·inline·void·_nocheck__trace_pci_nvme_identify_nslist_csi(uint16_t·ns,·uint8_t·csi)

2305

static·inline·void·_nocheck__trace_pci_nvme_identify_nslist_csi(uint16_t·ns,·uint8_t·csi)

2306

{

2306

{

2307

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_NSLIST_CSI)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2307

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_NSLIST_CSI)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2308

········if·(message_with_timestamp)·{

2308

········if·(message_with_timestamp)·{

2309

············struct·timeval·_now;

2309

············struct·timeval·_now;

2310

············gettimeofday(&_now,·NULL);

2310

············gettimeofday(&_now,·NULL);

2312

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_nslist_csi·"·"nsid=%"PRIu16",·csi=0x%"PRIx8""·"\n",

2312

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_nslist_csi·"·"nsid=%"PRIu16",·csi=0x%"PRIx8""·"\n",

2313

·····················qemu_get_thread_id(),

2313

·····················qemu_get_thread_id(),

2314

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2314

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2315

·····················,·ns,·csi);

2315

·····················,·ns,·csi);

2316

#line·2318·"trace/trace-hw_nvme.h"

2316

#line·2318·"trace/trace-hw_nvme.h"

2317

········}·else·{

2317

········}·else·{

2319

············qemu_log("pci_nvme_identify_nslist_csi·"·"nsid=%"PRIu16",·csi=0x%"PRIx8""·"\n",·ns,·csi);

2319

············qemu_log("pci_nvme_identify_nslist_csi·"·"nsid=%"PRIu16",·csi=0x%"PRIx8""·"\n",·ns,·csi);

2320

#line·2322·"trace/trace-hw_nvme.h"

2320

#line·2322·"trace/trace-hw_nvme.h"

2321

········}

2321

········}

2322

····}

2322

····}

2323

}

2323

}

2324

static·inline·void·trace_pci_nvme_identify_nslist_csi(uint16_t·ns,·uint8_t·csi)

2324

static·inline·void·trace_pci_nvme_identify_nslist_csi(uint16_t·ns,·uint8_t·csi)

2336

static·inline·void·_nocheck__trace_pci_nvme_identify_cmd_set(void)

2336

static·inline·void·_nocheck__trace_pci_nvme_identify_cmd_set(void)

2337

{

2337

{

2338

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_CMD_SET)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2338

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_CMD_SET)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2339

········if·(message_with_timestamp)·{

2339

········if·(message_with_timestamp)·{

2340

············struct·timeval·_now;

2340

············struct·timeval·_now;

2341

············gettimeofday(&_now,·NULL);

2341

············gettimeofday(&_now,·NULL);

2343

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_cmd_set·"·"identify·i/o·command·set"·"\n",

2343

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_cmd_set·"·"identify·i/o·command·set"·"\n",

2344

·····················qemu_get_thread_id(),

2344

·····················qemu_get_thread_id(),

2345

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2345

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2346

·····················);

2346

·····················);

2347

#line·2349·"trace/trace-hw_nvme.h"

2347

#line·2349·"trace/trace-hw_nvme.h"

2348

········}·else·{

2348

········}·else·{

2350

············qemu_log("pci_nvme_identify_cmd_set·"·"identify·i/o·command·set"·"\n");

2350

············qemu_log("pci_nvme_identify_cmd_set·"·"identify·i/o·command·set"·"\n");

2351

#line·2353·"trace/trace-hw_nvme.h"

2351

#line·2353·"trace/trace-hw_nvme.h"

2352

········}

2352

········}

2353

····}

2353

····}

2354

}

2354

}

2355

static·inline·void·trace_pci_nvme_identify_cmd_set(void)

2355

static·inline·void·trace_pci_nvme_identify_cmd_set(void)

2367

static·inline·void·_nocheck__trace_pci_nvme_identify_ns_descr_list(uint32_t·ns)

2367

static·inline·void·_nocheck__trace_pci_nvme_identify_ns_descr_list(uint32_t·ns)

2368

{

2368

{

2369

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_NS_DESCR_LIST)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2369

····if·(trace_event_get_state(TRACE_PCI_NVME_IDENTIFY_NS_DESCR_LIST)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2370

········if·(message_with_timestamp)·{

2370

········if·(message_with_timestamp)·{

2371

············struct·timeval·_now;

2371

············struct·timeval·_now;

2372

············gettimeofday(&_now,·NULL);

2372

············gettimeofday(&_now,·NULL);

2374

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_ns_descr_list·"·"nsid·%"PRIu32""·"\n",

2374

············qemu_log("%d@%zu.%06zu:pci_nvme_identify_ns_descr_list·"·"nsid·%"PRIu32""·"\n",

2375

·····················qemu_get_thread_id(),

2375

·····················qemu_get_thread_id(),

2376

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2376

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2377

·····················,·ns);

2377

·····················,·ns);

2378

#line·2380·"trace/trace-hw_nvme.h"

2378

#line·2380·"trace/trace-hw_nvme.h"

2379

········}·else·{

2379

········}·else·{

2381

············qemu_log("pci_nvme_identify_ns_descr_list·"·"nsid·%"PRIu32""·"\n",·ns);

2381

············qemu_log("pci_nvme_identify_ns_descr_list·"·"nsid·%"PRIu32""·"\n",·ns);

2382

#line·2384·"trace/trace-hw_nvme.h"

2382

#line·2384·"trace/trace-hw_nvme.h"

2383

········}

2383

········}

2384

····}

2384

····}

2385

}

2385

}

2386

static·inline·void·trace_pci_nvme_identify_ns_descr_list(uint32_t·ns)

2386

static·inline·void·trace_pci_nvme_identify_ns_descr_list(uint32_t·ns)

2398

static·inline·void·_nocheck__trace_pci_nvme_get_log(uint16_t·cid,·uint8_t·lid,·uint8_t·lsp,·uint8_t·rae,·uint32_t·len,·uint64_t·off)

2398

static·inline·void·_nocheck__trace_pci_nvme_get_log(uint16_t·cid,·uint8_t·lid,·uint8_t·lsp,·uint8_t·rae,·uint32_t·len,·uint64_t·off)

2399

{

2399

{

2400

····if·(trace_event_get_state(TRACE_PCI_NVME_GET_LOG)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2400

····if·(trace_event_get_state(TRACE_PCI_NVME_GET_LOG)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2401

········if·(message_with_timestamp)·{

2401

········if·(message_with_timestamp)·{

2402

············struct·timeval·_now;

2402

············struct·timeval·_now;

2403

············gettimeofday(&_now,·NULL);

2403

············gettimeofday(&_now,·NULL);

2405

············qemu_log("%d@%zu.%06zu:pci_nvme_get_log·"·"cid·%"PRIu16"·lid·0x%"PRIx8"·lsp·0x%"PRIx8"·rae·0x%"PRIx8"·len·%"PRIu32"·off·%"PRIu64""·"\n",

2405

············qemu_log("%d@%zu.%06zu:pci_nvme_get_log·"·"cid·%"PRIu16"·lid·0x%"PRIx8"·lsp·0x%"PRIx8"·rae·0x%"PRIx8"·len·%"PRIu32"·off·%"PRIu64""·"\n",

2406

·····················qemu_get_thread_id(),

2406

·····················qemu_get_thread_id(),

2407

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2407

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2408

·····················,·cid,·lid,·lsp,·rae,·len,·off);

2408

·····················,·cid,·lid,·lsp,·rae,·len,·off);

2409

#line·2411·"trace/trace-hw_nvme.h"

2409

#line·2411·"trace/trace-hw_nvme.h"

2410

········}·else·{

2410

········}·else·{

2412

············qemu_log("pci_nvme_get_log·"·"cid·%"PRIu16"·lid·0x%"PRIx8"·lsp·0x%"PRIx8"·rae·0x%"PRIx8"·len·%"PRIu32"·off·%"PRIu64""·"\n",·cid,·lid,·lsp,·rae,·len,·off);

2412

············qemu_log("pci_nvme_get_log·"·"cid·%"PRIu16"·lid·0x%"PRIx8"·lsp·0x%"PRIx8"·rae·0x%"PRIx8"·len·%"PRIu32"·off·%"PRIu64""·"\n",·cid,·lid,·lsp,·rae,·len,·off);

2413

#line·2415·"trace/trace-hw_nvme.h"

2413

#line·2415·"trace/trace-hw_nvme.h"

2414

········}

2414

········}

2415

····}

2415

····}

2416

}

2416

}

2417

static·inline·void·trace_pci_nvme_get_log(uint16_t·cid,·uint8_t·lid,·uint8_t·lsp,·uint8_t·rae,·uint32_t·len,·uint64_t·off)

2417

static·inline·void·trace_pci_nvme_get_log(uint16_t·cid,·uint8_t·lid,·uint8_t·lsp,·uint8_t·rae,·uint32_t·len,·uint64_t·off)

2429

static·inline·void·_nocheck__trace_pci_nvme_getfeat(uint16_t·cid,·uint32_t·nsid,·uint8_t·fid,·uint8_t·sel,·uint32_t·cdw11)

2429

static·inline·void·_nocheck__trace_pci_nvme_getfeat(uint16_t·cid,·uint32_t·nsid,·uint8_t·fid,·uint8_t·sel,·uint32_t·cdw11)

2430

{

2430

{

2431

····if·(trace_event_get_state(TRACE_PCI_NVME_GETFEAT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2431

····if·(trace_event_get_state(TRACE_PCI_NVME_GETFEAT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2432

········if·(message_with_timestamp)·{

2432

········if·(message_with_timestamp)·{

2433

············struct·timeval·_now;

2433

············struct·timeval·_now;

2434

············gettimeofday(&_now,·NULL);

2434

············gettimeofday(&_now,·NULL);

2436

············qemu_log("%d@%zu.%06zu:pci_nvme_getfeat·"·"cid·%"PRIu16"·nsid·0x%"PRIx32"·fid·0x%"PRIx8"·sel·0x%"PRIx8"·cdw11·0x%"PRIx32""·"\n",

2436

············qemu_log("%d@%zu.%06zu:pci_nvme_getfeat·"·"cid·%"PRIu16"·nsid·0x%"PRIx32"·fid·0x%"PRIx8"·sel·0x%"PRIx8"·cdw11·0x%"PRIx32""·"\n",

2437

·····················qemu_get_thread_id(),

2437

·····················qemu_get_thread_id(),

2438

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2438

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2439

·····················,·cid,·nsid,·fid,·sel,·cdw11);

2439

·····················,·cid,·nsid,·fid,·sel,·cdw11);

2440

#line·2442·"trace/trace-hw_nvme.h"

2440

#line·2442·"trace/trace-hw_nvme.h"

2441

········}·else·{

2441

········}·else·{

2443

············qemu_log("pci_nvme_getfeat·"·"cid·%"PRIu16"·nsid·0x%"PRIx32"·fid·0x%"PRIx8"·sel·0x%"PRIx8"·cdw11·0x%"PRIx32""·"\n",·cid,·nsid,·fid,·sel,·cdw11);

2443

············qemu_log("pci_nvme_getfeat·"·"cid·%"PRIu16"·nsid·0x%"PRIx32"·fid·0x%"PRIx8"·sel·0x%"PRIx8"·cdw11·0x%"PRIx32""·"\n",·cid,·nsid,·fid,·sel,·cdw11);

2444

#line·2446·"trace/trace-hw_nvme.h"

2444

#line·2446·"trace/trace-hw_nvme.h"

2445

········}

2445

········}

2446

····}

2446

····}

2447

}

2447

}

2448

static·inline·void·trace_pci_nvme_getfeat(uint16_t·cid,·uint32_t·nsid,·uint8_t·fid,·uint8_t·sel,·uint32_t·cdw11)

2448

static·inline·void·trace_pci_nvme_getfeat(uint16_t·cid,·uint32_t·nsid,·uint8_t·fid,·uint8_t·sel,·uint32_t·cdw11)

2460

static·inline·void·_nocheck__trace_pci_nvme_setfeat(uint16_t·cid,·uint32_t·nsid,·uint8_t·fid,·uint8_t·save,·uint32_t·cdw11)

2460

static·inline·void·_nocheck__trace_pci_nvme_setfeat(uint16_t·cid,·uint32_t·nsid,·uint8_t·fid,·uint8_t·save,·uint32_t·cdw11)

2461

{

2461

{

2462

····if·(trace_event_get_state(TRACE_PCI_NVME_SETFEAT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2462

····if·(trace_event_get_state(TRACE_PCI_NVME_SETFEAT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2463

········if·(message_with_timestamp)·{

2463

········if·(message_with_timestamp)·{

2464

············struct·timeval·_now;

2464

············struct·timeval·_now;

2465

············gettimeofday(&_now,·NULL);

2465

············gettimeofday(&_now,·NULL);

2467

············qemu_log("%d@%zu.%06zu:pci_nvme_setfeat·"·"cid·%"PRIu16"·nsid·0x%"PRIx32"·fid·0x%"PRIx8"·save·0x%"PRIx8"·cdw11·0x%"PRIx32""·"\n",

2467

············qemu_log("%d@%zu.%06zu:pci_nvme_setfeat·"·"cid·%"PRIu16"·nsid·0x%"PRIx32"·fid·0x%"PRIx8"·save·0x%"PRIx8"·cdw11·0x%"PRIx32""·"\n",

2468

·····················qemu_get_thread_id(),

2468

·····················qemu_get_thread_id(),

2469

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2469

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2470

·····················,·cid,·nsid,·fid,·save,·cdw11);

2470

·····················,·cid,·nsid,·fid,·save,·cdw11);

2471

#line·2473·"trace/trace-hw_nvme.h"

2471

#line·2473·"trace/trace-hw_nvme.h"

2472

········}·else·{

2472

········}·else·{

2474

············qemu_log("pci_nvme_setfeat·"·"cid·%"PRIu16"·nsid·0x%"PRIx32"·fid·0x%"PRIx8"·save·0x%"PRIx8"·cdw11·0x%"PRIx32""·"\n",·cid,·nsid,·fid,·save,·cdw11);

2474

············qemu_log("pci_nvme_setfeat·"·"cid·%"PRIu16"·nsid·0x%"PRIx32"·fid·0x%"PRIx8"·save·0x%"PRIx8"·cdw11·0x%"PRIx32""·"\n",·cid,·nsid,·fid,·save,·cdw11);

2475

#line·2477·"trace/trace-hw_nvme.h"

2475

#line·2477·"trace/trace-hw_nvme.h"

2476

········}

2476

········}

2477

····}

2477

····}

2478

}

2478

}

2479

static·inline·void·trace_pci_nvme_setfeat(uint16_t·cid,·uint32_t·nsid,·uint8_t·fid,·uint8_t·save,·uint32_t·cdw11)

2479

static·inline·void·trace_pci_nvme_setfeat(uint16_t·cid,·uint32_t·nsid,·uint8_t·fid,·uint8_t·save,·uint32_t·cdw11)

2491

static·inline·void·_nocheck__trace_pci_nvme_getfeat_vwcache(const·char*·result)

2491

static·inline·void·_nocheck__trace_pci_nvme_getfeat_vwcache(const·char*·result)

2492

{

2492

{

2493

····if·(trace_event_get_state(TRACE_PCI_NVME_GETFEAT_VWCACHE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2493

····if·(trace_event_get_state(TRACE_PCI_NVME_GETFEAT_VWCACHE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2494

········if·(message_with_timestamp)·{

2494

········if·(message_with_timestamp)·{

2495

············struct·timeval·_now;

2495

············struct·timeval·_now;

2496

············gettimeofday(&_now,·NULL);

2496

············gettimeofday(&_now,·NULL);

2498

············qemu_log("%d@%zu.%06zu:pci_nvme_getfeat_vwcache·"·"get·feature·volatile·write·cache,·result=%s"·"\n",

2498

············qemu_log("%d@%zu.%06zu:pci_nvme_getfeat_vwcache·"·"get·feature·volatile·write·cache,·result=%s"·"\n",

2499

·····················qemu_get_thread_id(),

2499

·····················qemu_get_thread_id(),

2500

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2500

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2501

·····················,·result);

2501

·····················,·result);

2502

#line·2504·"trace/trace-hw_nvme.h"

2502

#line·2504·"trace/trace-hw_nvme.h"

2503

········}·else·{

2503

········}·else·{

2505

············qemu_log("pci_nvme_getfeat_vwcache·"·"get·feature·volatile·write·cache,·result=%s"·"\n",·result);

2505

············qemu_log("pci_nvme_getfeat_vwcache·"·"get·feature·volatile·write·cache,·result=%s"·"\n",·result);

2506

#line·2508·"trace/trace-hw_nvme.h"

2506

#line·2508·"trace/trace-hw_nvme.h"

2507

········}

2507

········}

2508

····}

2508

····}

2509

}

2509

}

2510

static·inline·void·trace_pci_nvme_getfeat_vwcache(const·char*·result)

2510

static·inline·void·trace_pci_nvme_getfeat_vwcache(const·char*·result)

2522

static·inline·void·_nocheck__trace_pci_nvme_getfeat_numq(int·result)

2522

static·inline·void·_nocheck__trace_pci_nvme_getfeat_numq(int·result)

2523

{

2523

{

2524

····if·(trace_event_get_state(TRACE_PCI_NVME_GETFEAT_NUMQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2524

····if·(trace_event_get_state(TRACE_PCI_NVME_GETFEAT_NUMQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2525

········if·(message_with_timestamp)·{

2525

········if·(message_with_timestamp)·{

2526

············struct·timeval·_now;

2526

············struct·timeval·_now;

2527

············gettimeofday(&_now,·NULL);

2527

············gettimeofday(&_now,·NULL);

2529

············qemu_log("%d@%zu.%06zu:pci_nvme_getfeat_numq·"·"get·feature·number·of·queues,·result=%d"·"\n",

2529

············qemu_log("%d@%zu.%06zu:pci_nvme_getfeat_numq·"·"get·feature·number·of·queues,·result=%d"·"\n",

2530

·····················qemu_get_thread_id(),

2530

·····················qemu_get_thread_id(),

2531

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2531

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2532

·····················,·result);

2532

·····················,·result);

2533

#line·2535·"trace/trace-hw_nvme.h"

2533

#line·2535·"trace/trace-hw_nvme.h"

2534

········}·else·{

2534

········}·else·{

2536

············qemu_log("pci_nvme_getfeat_numq·"·"get·feature·number·of·queues,·result=%d"·"\n",·result);

2536

············qemu_log("pci_nvme_getfeat_numq·"·"get·feature·number·of·queues,·result=%d"·"\n",·result);

2537

#line·2539·"trace/trace-hw_nvme.h"

2537

#line·2539·"trace/trace-hw_nvme.h"

2538

········}

2538

········}

2539

····}

2539

····}

2540

}

2540

}

2541

static·inline·void·trace_pci_nvme_getfeat_numq(int·result)

2541

static·inline·void·trace_pci_nvme_getfeat_numq(int·result)

2553

static·inline·void·_nocheck__trace_pci_nvme_setfeat_numq(int·reqcq,·int·reqsq,·int·gotcq,·int·gotsq)

2553

static·inline·void·_nocheck__trace_pci_nvme_setfeat_numq(int·reqcq,·int·reqsq,·int·gotcq,·int·gotsq)

2554

{

2554

{

2555

····if·(trace_event_get_state(TRACE_PCI_NVME_SETFEAT_NUMQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2555

····if·(trace_event_get_state(TRACE_PCI_NVME_SETFEAT_NUMQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2556

········if·(message_with_timestamp)·{

2556

········if·(message_with_timestamp)·{

2557

············struct·timeval·_now;

2557

············struct·timeval·_now;

2558

············gettimeofday(&_now,·NULL);

2558

············gettimeofday(&_now,·NULL);

2560

············qemu_log("%d@%zu.%06zu:pci_nvme_setfeat_numq·"·"requested·cq_count=%d·sq_count=%d,·responding·with·cq_count=%d·sq_count=%d"·"\n",

2560

············qemu_log("%d@%zu.%06zu:pci_nvme_setfeat_numq·"·"requested·cq_count=%d·sq_count=%d,·responding·with·cq_count=%d·sq_count=%d"·"\n",

2561

·····················qemu_get_thread_id(),

2561

·····················qemu_get_thread_id(),

2562

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2562

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2563

·····················,·reqcq,·reqsq,·gotcq,·gotsq);

2563

·····················,·reqcq,·reqsq,·gotcq,·gotsq);

2564

#line·2566·"trace/trace-hw_nvme.h"

2564

#line·2566·"trace/trace-hw_nvme.h"

2565

········}·else·{

2565

········}·else·{

2567

············qemu_log("pci_nvme_setfeat_numq·"·"requested·cq_count=%d·sq_count=%d,·responding·with·cq_count=%d·sq_count=%d"·"\n",·reqcq,·reqsq,·gotcq,·gotsq);

2567

············qemu_log("pci_nvme_setfeat_numq·"·"requested·cq_count=%d·sq_count=%d,·responding·with·cq_count=%d·sq_count=%d"·"\n",·reqcq,·reqsq,·gotcq,·gotsq);

2568

#line·2570·"trace/trace-hw_nvme.h"

2568

#line·2570·"trace/trace-hw_nvme.h"

2569

········}

2569

········}

2570

····}

2570

····}

2571

}

2571

}

2572

static·inline·void·trace_pci_nvme_setfeat_numq(int·reqcq,·int·reqsq,·int·gotcq,·int·gotsq)

2572

static·inline·void·trace_pci_nvme_setfeat_numq(int·reqcq,·int·reqsq,·int·gotcq,·int·gotsq)

2584

static·inline·void·_nocheck__trace_pci_nvme_setfeat_timestamp(uint64_t·ts)

2584

static·inline·void·_nocheck__trace_pci_nvme_setfeat_timestamp(uint64_t·ts)

2585

{

2585

{

2586

····if·(trace_event_get_state(TRACE_PCI_NVME_SETFEAT_TIMESTAMP)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2586

····if·(trace_event_get_state(TRACE_PCI_NVME_SETFEAT_TIMESTAMP)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2587

········if·(message_with_timestamp)·{

2587

········if·(message_with_timestamp)·{

2588

············struct·timeval·_now;

2588

············struct·timeval·_now;

2589

············gettimeofday(&_now,·NULL);

2589

············gettimeofday(&_now,·NULL);

2591

············qemu_log("%d@%zu.%06zu:pci_nvme_setfeat_timestamp·"·"set·feature·timestamp·=·0x%"PRIx64""·"\n",

2591

············qemu_log("%d@%zu.%06zu:pci_nvme_setfeat_timestamp·"·"set·feature·timestamp·=·0x%"PRIx64""·"\n",

2592

·····················qemu_get_thread_id(),

2592

·····················qemu_get_thread_id(),

2593

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2593

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2594

·····················,·ts);

2594

·····················,·ts);

2595

#line·2597·"trace/trace-hw_nvme.h"

2595

#line·2597·"trace/trace-hw_nvme.h"

2596

········}·else·{

2596

········}·else·{

2598

············qemu_log("pci_nvme_setfeat_timestamp·"·"set·feature·timestamp·=·0x%"PRIx64""·"\n",·ts);

2598

············qemu_log("pci_nvme_setfeat_timestamp·"·"set·feature·timestamp·=·0x%"PRIx64""·"\n",·ts);

2599

#line·2601·"trace/trace-hw_nvme.h"

2599

#line·2601·"trace/trace-hw_nvme.h"

2600

········}

2600

········}

2601

····}

2601

····}

2602

}

2602

}

2603

static·inline·void·trace_pci_nvme_setfeat_timestamp(uint64_t·ts)

2603

static·inline·void·trace_pci_nvme_setfeat_timestamp(uint64_t·ts)

2615

static·inline·void·_nocheck__trace_pci_nvme_getfeat_timestamp(uint64_t·ts)

2615

static·inline·void·_nocheck__trace_pci_nvme_getfeat_timestamp(uint64_t·ts)

2616

{

2616

{

2617

····if·(trace_event_get_state(TRACE_PCI_NVME_GETFEAT_TIMESTAMP)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2617

····if·(trace_event_get_state(TRACE_PCI_NVME_GETFEAT_TIMESTAMP)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2618

········if·(message_with_timestamp)·{

2618

········if·(message_with_timestamp)·{

2619

············struct·timeval·_now;

2619

············struct·timeval·_now;

2620

············gettimeofday(&_now,·NULL);

2620

············gettimeofday(&_now,·NULL);

2622

············qemu_log("%d@%zu.%06zu:pci_nvme_getfeat_timestamp·"·"get·feature·timestamp·=·0x%"PRIx64""·"\n",

2622

············qemu_log("%d@%zu.%06zu:pci_nvme_getfeat_timestamp·"·"get·feature·timestamp·=·0x%"PRIx64""·"\n",

2623

·····················qemu_get_thread_id(),

2623

·····················qemu_get_thread_id(),

2624

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2624

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2625

·····················,·ts);

2625

·····················,·ts);

2626

#line·2628·"trace/trace-hw_nvme.h"

2626

#line·2628·"trace/trace-hw_nvme.h"

2627

········}·else·{

2627

········}·else·{

2629

············qemu_log("pci_nvme_getfeat_timestamp·"·"get·feature·timestamp·=·0x%"PRIx64""·"\n",·ts);

2629

············qemu_log("pci_nvme_getfeat_timestamp·"·"get·feature·timestamp·=·0x%"PRIx64""·"\n",·ts);

2630

#line·2632·"trace/trace-hw_nvme.h"

2630

#line·2632·"trace/trace-hw_nvme.h"

2631

········}

2631

········}

2632

····}

2632

····}

2633

}

2633

}

2634

static·inline·void·trace_pci_nvme_getfeat_timestamp(uint64_t·ts)

2634

static·inline·void·trace_pci_nvme_getfeat_timestamp(uint64_t·ts)

2646

static·inline·void·_nocheck__trace_pci_nvme_process_aers(int·queued)

2646

static·inline·void·_nocheck__trace_pci_nvme_process_aers(int·queued)

2647

{

2647

{

2648

····if·(trace_event_get_state(TRACE_PCI_NVME_PROCESS_AERS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2648

····if·(trace_event_get_state(TRACE_PCI_NVME_PROCESS_AERS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2649

········if·(message_with_timestamp)·{

2649

········if·(message_with_timestamp)·{

2650

············struct·timeval·_now;

2650

············struct·timeval·_now;

2651

············gettimeofday(&_now,·NULL);

2651

············gettimeofday(&_now,·NULL);

2653

············qemu_log("%d@%zu.%06zu:pci_nvme_process_aers·"·"queued·%d"·"\n",

2653

············qemu_log("%d@%zu.%06zu:pci_nvme_process_aers·"·"queued·%d"·"\n",

2654

·····················qemu_get_thread_id(),

2654

·····················qemu_get_thread_id(),

2655

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2655

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2656

·····················,·queued);

2656

·····················,·queued);

2657

#line·2659·"trace/trace-hw_nvme.h"

2657

#line·2659·"trace/trace-hw_nvme.h"

2658

········}·else·{

2658

········}·else·{

2660

············qemu_log("pci_nvme_process_aers·"·"queued·%d"·"\n",·queued);

2660

············qemu_log("pci_nvme_process_aers·"·"queued·%d"·"\n",·queued);

2661

#line·2663·"trace/trace-hw_nvme.h"

2661

#line·2663·"trace/trace-hw_nvme.h"

2662

········}

2662

········}

2663

····}

2663

····}

2664

}

2664

}

2665

static·inline·void·trace_pci_nvme_process_aers(int·queued)

2665

static·inline·void·trace_pci_nvme_process_aers(int·queued)

2677

static·inline·void·_nocheck__trace_pci_nvme_aer(uint16_t·cid)

2677

static·inline·void·_nocheck__trace_pci_nvme_aer(uint16_t·cid)

2678

{

2678

{

2679

····if·(trace_event_get_state(TRACE_PCI_NVME_AER)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2679

····if·(trace_event_get_state(TRACE_PCI_NVME_AER)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2680

········if·(message_with_timestamp)·{

2680

········if·(message_with_timestamp)·{

2681

············struct·timeval·_now;

2681

············struct·timeval·_now;

2682

············gettimeofday(&_now,·NULL);

2682

············gettimeofday(&_now,·NULL);

2684

············qemu_log("%d@%zu.%06zu:pci_nvme_aer·"·"cid·%"PRIu16""·"\n",

2684

············qemu_log("%d@%zu.%06zu:pci_nvme_aer·"·"cid·%"PRIu16""·"\n",

2685

·····················qemu_get_thread_id(),

2685

·····················qemu_get_thread_id(),

2686

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2686

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2687

·····················,·cid);

2687

·····················,·cid);

2688

#line·2690·"trace/trace-hw_nvme.h"

2688

#line·2690·"trace/trace-hw_nvme.h"

2689

········}·else·{

2689

········}·else·{

2691

············qemu_log("pci_nvme_aer·"·"cid·%"PRIu16""·"\n",·cid);

2691

············qemu_log("pci_nvme_aer·"·"cid·%"PRIu16""·"\n",·cid);

2692

#line·2694·"trace/trace-hw_nvme.h"

2692

#line·2694·"trace/trace-hw_nvme.h"

2693

········}

2693

········}

2694

····}

2694

····}

2695

}

2695

}

2696

static·inline·void·trace_pci_nvme_aer(uint16_t·cid)

2696

static·inline·void·trace_pci_nvme_aer(uint16_t·cid)

2708

static·inline·void·_nocheck__trace_pci_nvme_aer_aerl_exceeded(void)

2708

static·inline·void·_nocheck__trace_pci_nvme_aer_aerl_exceeded(void)

2709

{

2709

{

2710

····if·(trace_event_get_state(TRACE_PCI_NVME_AER_AERL_EXCEEDED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2710

····if·(trace_event_get_state(TRACE_PCI_NVME_AER_AERL_EXCEEDED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2711

········if·(message_with_timestamp)·{

2711

········if·(message_with_timestamp)·{

2712

············struct·timeval·_now;

2712

············struct·timeval·_now;

2713

············gettimeofday(&_now,·NULL);

2713

············gettimeofday(&_now,·NULL);

2715

············qemu_log("%d@%zu.%06zu:pci_nvme_aer_aerl_exceeded·"·"aerl·exceeded"·"\n",

2715

············qemu_log("%d@%zu.%06zu:pci_nvme_aer_aerl_exceeded·"·"aerl·exceeded"·"\n",

2716

·····················qemu_get_thread_id(),

2716

·····················qemu_get_thread_id(),

2717

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2717

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2718

·····················);

2718

·····················);

2719

#line·2721·"trace/trace-hw_nvme.h"

2719

#line·2721·"trace/trace-hw_nvme.h"

2720

········}·else·{

2720

········}·else·{

2722

············qemu_log("pci_nvme_aer_aerl_exceeded·"·"aerl·exceeded"·"\n");

2722

············qemu_log("pci_nvme_aer_aerl_exceeded·"·"aerl·exceeded"·"\n");

2723

#line·2725·"trace/trace-hw_nvme.h"

2723

#line·2725·"trace/trace-hw_nvme.h"

2724

········}

2724

········}

2725

····}

2725

····}

2726

}

2726

}

2727

static·inline·void·trace_pci_nvme_aer_aerl_exceeded(void)

2727

static·inline·void·trace_pci_nvme_aer_aerl_exceeded(void)

2739

static·inline·void·_nocheck__trace_pci_nvme_aer_masked(uint8_t·type,·uint8_t·mask)

2739

static·inline·void·_nocheck__trace_pci_nvme_aer_masked(uint8_t·type,·uint8_t·mask)

2740

{

2740

{

2741

····if·(trace_event_get_state(TRACE_PCI_NVME_AER_MASKED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2741

····if·(trace_event_get_state(TRACE_PCI_NVME_AER_MASKED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2742

········if·(message_with_timestamp)·{

2742

········if·(message_with_timestamp)·{

2743

············struct·timeval·_now;

2743

············struct·timeval·_now;

2744

············gettimeofday(&_now,·NULL);

2744

············gettimeofday(&_now,·NULL);

2746

············qemu_log("%d@%zu.%06zu:pci_nvme_aer_masked·"·"type·0x%"PRIx8"·mask·0x%"PRIx8""·"\n",

2746

············qemu_log("%d@%zu.%06zu:pci_nvme_aer_masked·"·"type·0x%"PRIx8"·mask·0x%"PRIx8""·"\n",

2747

·····················qemu_get_thread_id(),

2747

·····················qemu_get_thread_id(),

2748

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2748

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2749

·····················,·type,·mask);

2749

·····················,·type,·mask);

2750

#line·2752·"trace/trace-hw_nvme.h"

2750

#line·2752·"trace/trace-hw_nvme.h"

2751

········}·else·{

2751

········}·else·{

2753

············qemu_log("pci_nvme_aer_masked·"·"type·0x%"PRIx8"·mask·0x%"PRIx8""·"\n",·type,·mask);

2753

············qemu_log("pci_nvme_aer_masked·"·"type·0x%"PRIx8"·mask·0x%"PRIx8""·"\n",·type,·mask);

2754

#line·2756·"trace/trace-hw_nvme.h"

2754

#line·2756·"trace/trace-hw_nvme.h"

2755

········}

2755

········}

2756

····}

2756

····}

2757

}

2757

}

2758

static·inline·void·trace_pci_nvme_aer_masked(uint8_t·type,·uint8_t·mask)

2758

static·inline·void·trace_pci_nvme_aer_masked(uint8_t·type,·uint8_t·mask)

2770

static·inline·void·_nocheck__trace_pci_nvme_aer_post_cqe(uint8_t·typ,·uint8_t·info,·uint8_t·log_page)

2770

static·inline·void·_nocheck__trace_pci_nvme_aer_post_cqe(uint8_t·typ,·uint8_t·info,·uint8_t·log_page)

2771

{

2771

{

2772

····if·(trace_event_get_state(TRACE_PCI_NVME_AER_POST_CQE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2772

····if·(trace_event_get_state(TRACE_PCI_NVME_AER_POST_CQE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2773

········if·(message_with_timestamp)·{

2773

········if·(message_with_timestamp)·{

2774

············struct·timeval·_now;

2774

············struct·timeval·_now;

2775

············gettimeofday(&_now,·NULL);

2775

············gettimeofday(&_now,·NULL);

2777

············qemu_log("%d@%zu.%06zu:pci_nvme_aer_post_cqe·"·"type·0x%"PRIx8"·info·0x%"PRIx8"·lid·0x%"PRIx8""·"\n",

2777

············qemu_log("%d@%zu.%06zu:pci_nvme_aer_post_cqe·"·"type·0x%"PRIx8"·info·0x%"PRIx8"·lid·0x%"PRIx8""·"\n",

2778

·····················qemu_get_thread_id(),

2778

·····················qemu_get_thread_id(),

2779

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2779

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2780

·····················,·typ,·info,·log_page);

2780

·····················,·typ,·info,·log_page);

2781

#line·2783·"trace/trace-hw_nvme.h"

2781

#line·2783·"trace/trace-hw_nvme.h"

2782

········}·else·{

2782

········}·else·{

2784

············qemu_log("pci_nvme_aer_post_cqe·"·"type·0x%"PRIx8"·info·0x%"PRIx8"·lid·0x%"PRIx8""·"\n",·typ,·info,·log_page);

2784

············qemu_log("pci_nvme_aer_post_cqe·"·"type·0x%"PRIx8"·info·0x%"PRIx8"·lid·0x%"PRIx8""·"\n",·typ,·info,·log_page);

2785

#line·2787·"trace/trace-hw_nvme.h"

2785

#line·2787·"trace/trace-hw_nvme.h"

2786

········}

2786

········}

2787

····}

2787

····}

2788

}

2788

}

2789

static·inline·void·trace_pci_nvme_aer_post_cqe(uint8_t·typ,·uint8_t·info,·uint8_t·log_page)

2789

static·inline·void·trace_pci_nvme_aer_post_cqe(uint8_t·typ,·uint8_t·info,·uint8_t·log_page)

2801

static·inline·void·_nocheck__trace_pci_nvme_ns_attachment(uint16_t·cid,·uint8_t·sel)

2801

static·inline·void·_nocheck__trace_pci_nvme_ns_attachment(uint16_t·cid,·uint8_t·sel)

2802

{

2802

{

2803

····if·(trace_event_get_state(TRACE_PCI_NVME_NS_ATTACHMENT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2803

····if·(trace_event_get_state(TRACE_PCI_NVME_NS_ATTACHMENT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2804

········if·(message_with_timestamp)·{

2804

········if·(message_with_timestamp)·{

2805

············struct·timeval·_now;

2805

············struct·timeval·_now;

2806

············gettimeofday(&_now,·NULL);

2806

············gettimeofday(&_now,·NULL);

2808

············qemu_log("%d@%zu.%06zu:pci_nvme_ns_attachment·"·"cid·%"PRIu16",·sel=0x%"PRIx8""·"\n",

2808

············qemu_log("%d@%zu.%06zu:pci_nvme_ns_attachment·"·"cid·%"PRIu16",·sel=0x%"PRIx8""·"\n",

2809

·····················qemu_get_thread_id(),

2809

·····················qemu_get_thread_id(),

2810

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2810

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2811

·····················,·cid,·sel);

2811

·····················,·cid,·sel);

2812

#line·2814·"trace/trace-hw_nvme.h"

2812

#line·2814·"trace/trace-hw_nvme.h"

2813

········}·else·{

2813

········}·else·{

2815

············qemu_log("pci_nvme_ns_attachment·"·"cid·%"PRIu16",·sel=0x%"PRIx8""·"\n",·cid,·sel);

2815

············qemu_log("pci_nvme_ns_attachment·"·"cid·%"PRIu16",·sel=0x%"PRIx8""·"\n",·cid,·sel);

2816

#line·2818·"trace/trace-hw_nvme.h"

2816

#line·2818·"trace/trace-hw_nvme.h"

2817

········}

2817

········}

2818

····}

2818

····}

2819

}

2819

}

2820

static·inline·void·trace_pci_nvme_ns_attachment(uint16_t·cid,·uint8_t·sel)

2820

static·inline·void·trace_pci_nvme_ns_attachment(uint16_t·cid,·uint8_t·sel)

2832

static·inline·void·_nocheck__trace_pci_nvme_ns_attachment_attach(uint16_t·cntlid,·uint32_t·nsid)

2832

static·inline·void·_nocheck__trace_pci_nvme_ns_attachment_attach(uint16_t·cntlid,·uint32_t·nsid)

2833

{

2833

{

2834

····if·(trace_event_get_state(TRACE_PCI_NVME_NS_ATTACHMENT_ATTACH)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2834

····if·(trace_event_get_state(TRACE_PCI_NVME_NS_ATTACHMENT_ATTACH)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2835

········if·(message_with_timestamp)·{

2835

········if·(message_with_timestamp)·{

2836

············struct·timeval·_now;

2836

············struct·timeval·_now;

2837

············gettimeofday(&_now,·NULL);

2837

············gettimeofday(&_now,·NULL);

2839

············qemu_log("%d@%zu.%06zu:pci_nvme_ns_attachment_attach·"·"cntlid=0x%"PRIx16",·nsid=0x%"PRIx32""·"\n",

2839

············qemu_log("%d@%zu.%06zu:pci_nvme_ns_attachment_attach·"·"cntlid=0x%"PRIx16",·nsid=0x%"PRIx32""·"\n",

2840

·····················qemu_get_thread_id(),

2840

·····················qemu_get_thread_id(),

2841

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2841

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2842

·····················,·cntlid,·nsid);

2842

·····················,·cntlid,·nsid);

2843

#line·2845·"trace/trace-hw_nvme.h"

2843

#line·2845·"trace/trace-hw_nvme.h"

2844

········}·else·{

2844

········}·else·{

2846

············qemu_log("pci_nvme_ns_attachment_attach·"·"cntlid=0x%"PRIx16",·nsid=0x%"PRIx32""·"\n",·cntlid,·nsid);

2846

············qemu_log("pci_nvme_ns_attachment_attach·"·"cntlid=0x%"PRIx16",·nsid=0x%"PRIx32""·"\n",·cntlid,·nsid);

2847

#line·2849·"trace/trace-hw_nvme.h"

2847

#line·2849·"trace/trace-hw_nvme.h"

2848

········}

2848

········}

2849

····}

2849

····}

2850

}

2850

}

2851

static·inline·void·trace_pci_nvme_ns_attachment_attach(uint16_t·cntlid,·uint32_t·nsid)

2851

static·inline·void·trace_pci_nvme_ns_attachment_attach(uint16_t·cntlid,·uint32_t·nsid)

2863

static·inline·void·_nocheck__trace_pci_nvme_enqueue_event(uint8_t·typ,·uint8_t·info,·uint8_t·log_page)

2863

static·inline·void·_nocheck__trace_pci_nvme_enqueue_event(uint8_t·typ,·uint8_t·info,·uint8_t·log_page)

2864

{

2864

{

2865

····if·(trace_event_get_state(TRACE_PCI_NVME_ENQUEUE_EVENT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2865

····if·(trace_event_get_state(TRACE_PCI_NVME_ENQUEUE_EVENT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2866

········if·(message_with_timestamp)·{

2866

········if·(message_with_timestamp)·{

2867

············struct·timeval·_now;

2867

············struct·timeval·_now;

2868

············gettimeofday(&_now,·NULL);

2868

············gettimeofday(&_now,·NULL);

2870

············qemu_log("%d@%zu.%06zu:pci_nvme_enqueue_event·"·"type·0x%"PRIx8"·info·0x%"PRIx8"·lid·0x%"PRIx8""·"\n",

2870

············qemu_log("%d@%zu.%06zu:pci_nvme_enqueue_event·"·"type·0x%"PRIx8"·info·0x%"PRIx8"·lid·0x%"PRIx8""·"\n",

2871

·····················qemu_get_thread_id(),

2871

·····················qemu_get_thread_id(),

2872

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2872

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2873

·····················,·typ,·info,·log_page);

2873

·····················,·typ,·info,·log_page);

2874

#line·2876·"trace/trace-hw_nvme.h"

2874

#line·2876·"trace/trace-hw_nvme.h"

2875

········}·else·{

2875

········}·else·{

2877

············qemu_log("pci_nvme_enqueue_event·"·"type·0x%"PRIx8"·info·0x%"PRIx8"·lid·0x%"PRIx8""·"\n",·typ,·info,·log_page);

2877

············qemu_log("pci_nvme_enqueue_event·"·"type·0x%"PRIx8"·info·0x%"PRIx8"·lid·0x%"PRIx8""·"\n",·typ,·info,·log_page);

2878

#line·2880·"trace/trace-hw_nvme.h"

2878

#line·2880·"trace/trace-hw_nvme.h"

2879

········}

2879

········}

2880

····}

2880

····}

2881

}

2881

}

2882

static·inline·void·trace_pci_nvme_enqueue_event(uint8_t·typ,·uint8_t·info,·uint8_t·log_page)

2882

static·inline·void·trace_pci_nvme_enqueue_event(uint8_t·typ,·uint8_t·info,·uint8_t·log_page)

2894

static·inline·void·_nocheck__trace_pci_nvme_enqueue_event_noqueue(int·queued)

2894

static·inline·void·_nocheck__trace_pci_nvme_enqueue_event_noqueue(int·queued)

2895

{

2895

{

2896

····if·(trace_event_get_state(TRACE_PCI_NVME_ENQUEUE_EVENT_NOQUEUE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2896

····if·(trace_event_get_state(TRACE_PCI_NVME_ENQUEUE_EVENT_NOQUEUE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2897

········if·(message_with_timestamp)·{

2897

········if·(message_with_timestamp)·{

2898

············struct·timeval·_now;

2898

············struct·timeval·_now;

2899

············gettimeofday(&_now,·NULL);

2899

············gettimeofday(&_now,·NULL);

2901

············qemu_log("%d@%zu.%06zu:pci_nvme_enqueue_event_noqueue·"·"queued·%d"·"\n",

2901

············qemu_log("%d@%zu.%06zu:pci_nvme_enqueue_event_noqueue·"·"queued·%d"·"\n",

2902

·····················qemu_get_thread_id(),

2902

·····················qemu_get_thread_id(),

2903

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2903

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2904

·····················,·queued);

2904

·····················,·queued);

2905

#line·2907·"trace/trace-hw_nvme.h"

2905

#line·2907·"trace/trace-hw_nvme.h"

2906

········}·else·{

2906

········}·else·{

2908

············qemu_log("pci_nvme_enqueue_event_noqueue·"·"queued·%d"·"\n",·queued);

2908

············qemu_log("pci_nvme_enqueue_event_noqueue·"·"queued·%d"·"\n",·queued);

2909

#line·2911·"trace/trace-hw_nvme.h"

2909

#line·2911·"trace/trace-hw_nvme.h"

2910

········}

2910

········}

2911

····}

2911

····}

2912

}

2912

}

2913

static·inline·void·trace_pci_nvme_enqueue_event_noqueue(int·queued)

2913

static·inline·void·trace_pci_nvme_enqueue_event_noqueue(int·queued)

2925

static·inline·void·_nocheck__trace_pci_nvme_enqueue_event_masked(uint8_t·typ)

2925

static·inline·void·_nocheck__trace_pci_nvme_enqueue_event_masked(uint8_t·typ)

2926

{

2926

{

2927

····if·(trace_event_get_state(TRACE_PCI_NVME_ENQUEUE_EVENT_MASKED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2927

····if·(trace_event_get_state(TRACE_PCI_NVME_ENQUEUE_EVENT_MASKED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2928

········if·(message_with_timestamp)·{

2928

········if·(message_with_timestamp)·{

2929

············struct·timeval·_now;

2929

············struct·timeval·_now;

2930

············gettimeofday(&_now,·NULL);

2930

············gettimeofday(&_now,·NULL);

2932

············qemu_log("%d@%zu.%06zu:pci_nvme_enqueue_event_masked·"·"type·0x%"PRIx8""·"\n",

2932

············qemu_log("%d@%zu.%06zu:pci_nvme_enqueue_event_masked·"·"type·0x%"PRIx8""·"\n",

2933

·····················qemu_get_thread_id(),

2933

·····················qemu_get_thread_id(),

2934

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2934

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2935

·····················,·typ);

2935

·····················,·typ);

2936

#line·2938·"trace/trace-hw_nvme.h"

2936

#line·2938·"trace/trace-hw_nvme.h"

2937

········}·else·{

2937

········}·else·{

2939

············qemu_log("pci_nvme_enqueue_event_masked·"·"type·0x%"PRIx8""·"\n",·typ);

2939

············qemu_log("pci_nvme_enqueue_event_masked·"·"type·0x%"PRIx8""·"\n",·typ);

2940

#line·2942·"trace/trace-hw_nvme.h"

2940

#line·2942·"trace/trace-hw_nvme.h"

2941

········}

2941

········}

2942

····}

2942

····}

2943

}

2943

}

2944

static·inline·void·trace_pci_nvme_enqueue_event_masked(uint8_t·typ)

2944

static·inline·void·trace_pci_nvme_enqueue_event_masked(uint8_t·typ)

2956

static·inline·void·_nocheck__trace_pci_nvme_no_outstanding_aers(void)

2956

static·inline·void·_nocheck__trace_pci_nvme_no_outstanding_aers(void)

2957

{

2957

{

2958

····if·(trace_event_get_state(TRACE_PCI_NVME_NO_OUTSTANDING_AERS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2958

····if·(trace_event_get_state(TRACE_PCI_NVME_NO_OUTSTANDING_AERS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2959

········if·(message_with_timestamp)·{

2959

········if·(message_with_timestamp)·{

2960

············struct·timeval·_now;

2960

············struct·timeval·_now;

2961

············gettimeofday(&_now,·NULL);

2961

············gettimeofday(&_now,·NULL);

2963

············qemu_log("%d@%zu.%06zu:pci_nvme_no_outstanding_aers·"·"ignoring·event;·no·outstanding·AERs"·"\n",

2963

············qemu_log("%d@%zu.%06zu:pci_nvme_no_outstanding_aers·"·"ignoring·event;·no·outstanding·AERs"·"\n",

2964

·····················qemu_get_thread_id(),

2964

·····················qemu_get_thread_id(),

2965

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2965

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2966

·····················);

2966

·····················);

2967

#line·2969·"trace/trace-hw_nvme.h"

2967

#line·2969·"trace/trace-hw_nvme.h"

2968

········}·else·{

2968

········}·else·{

2970

············qemu_log("pci_nvme_no_outstanding_aers·"·"ignoring·event;·no·outstanding·AERs"·"\n");

2970

············qemu_log("pci_nvme_no_outstanding_aers·"·"ignoring·event;·no·outstanding·AERs"·"\n");

2971

#line·2973·"trace/trace-hw_nvme.h"

2971

#line·2973·"trace/trace-hw_nvme.h"

2972

········}

2972

········}

2973

····}

2973

····}

2974

}

2974

}

2975

static·inline·void·trace_pci_nvme_no_outstanding_aers(void)

2975

static·inline·void·trace_pci_nvme_no_outstanding_aers(void)

2987

static·inline·void·_nocheck__trace_pci_nvme_enqueue_req_completion(uint16_t·cid,·uint16_t·cqid,·uint32_t·dw0,·uint32_t·dw1,·uint16_t·status)

2987

static·inline·void·_nocheck__trace_pci_nvme_enqueue_req_completion(uint16_t·cid,·uint16_t·cqid,·uint32_t·dw0,·uint32_t·dw1,·uint16_t·status)

2988

{

2988

{

2989

····if·(trace_event_get_state(TRACE_PCI_NVME_ENQUEUE_REQ_COMPLETION)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2989

····if·(trace_event_get_state(TRACE_PCI_NVME_ENQUEUE_REQ_COMPLETION)·&&·qemu_loglevel_mask(LOG_TRACE))·{

2990

········if·(message_with_timestamp)·{

2990

········if·(message_with_timestamp)·{

2991

············struct·timeval·_now;

2991

············struct·timeval·_now;

2992

············gettimeofday(&_now,·NULL);

2992

············gettimeofday(&_now,·NULL);

2994

············qemu_log("%d@%zu.%06zu:pci_nvme_enqueue_req_completion·"·"cid·%"PRIu16"·cqid·%"PRIu16"·dw0·0x%"PRIx32"·dw1·0x%"PRIx32"·status·0x%"PRIx16""·"\n",

2994

············qemu_log("%d@%zu.%06zu:pci_nvme_enqueue_req_completion·"·"cid·%"PRIu16"·cqid·%"PRIu16"·dw0·0x%"PRIx32"·dw1·0x%"PRIx32"·status·0x%"PRIx16""·"\n",

2995

·····················qemu_get_thread_id(),

2995

·····················qemu_get_thread_id(),

2996

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2996

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

2997

·····················,·cid,·cqid,·dw0,·dw1,·status);

2997

·····················,·cid,·cqid,·dw0,·dw1,·status);

2998

#line·3000·"trace/trace-hw_nvme.h"

2998

#line·3000·"trace/trace-hw_nvme.h"

2999

········}·else·{

2999

········}·else·{

3001

············qemu_log("pci_nvme_enqueue_req_completion·"·"cid·%"PRIu16"·cqid·%"PRIu16"·dw0·0x%"PRIx32"·dw1·0x%"PRIx32"·status·0x%"PRIx16""·"\n",·cid,·cqid,·dw0,·dw1,·status);

3001

············qemu_log("pci_nvme_enqueue_req_completion·"·"cid·%"PRIu16"·cqid·%"PRIu16"·dw0·0x%"PRIx32"·dw1·0x%"PRIx32"·status·0x%"PRIx16""·"\n",·cid,·cqid,·dw0,·dw1,·status);

3002

#line·3004·"trace/trace-hw_nvme.h"

3002

#line·3004·"trace/trace-hw_nvme.h"

3003

········}

3003

········}

3004

····}

3004

····}

3005

}

3005

}

3006

static·inline·void·trace_pci_nvme_enqueue_req_completion(uint16_t·cid,·uint16_t·cqid,·uint32_t·dw0,·uint32_t·dw1,·uint16_t·status)

3006

static·inline·void·trace_pci_nvme_enqueue_req_completion(uint16_t·cid,·uint16_t·cqid,·uint32_t·dw0,·uint32_t·dw1,·uint16_t·status)

3018

static·inline·void·_nocheck__trace_pci_nvme_mmio_read(uint64_t·addr,·unsigned·size)

3018

static·inline·void·_nocheck__trace_pci_nvme_mmio_read(uint64_t·addr,·unsigned·size)

3019

{

3019

{

3020

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_READ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3020

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_READ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3021

········if·(message_with_timestamp)·{

3021

········if·(message_with_timestamp)·{

3022

············struct·timeval·_now;

3022

············struct·timeval·_now;

3023

············gettimeofday(&_now,·NULL);

3023

············gettimeofday(&_now,·NULL);

3025

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_read·"·"addr·0x%"PRIx64"·size·%d"·"\n",

3025

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_read·"·"addr·0x%"PRIx64"·size·%d"·"\n",

3026

·····················qemu_get_thread_id(),

3026

·····················qemu_get_thread_id(),

3027

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3027

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3028

·····················,·addr,·size);

3028

·····················,·addr,·size);

3029

#line·3031·"trace/trace-hw_nvme.h"

3029

#line·3031·"trace/trace-hw_nvme.h"

3030

········}·else·{

3030

········}·else·{

3032

············qemu_log("pci_nvme_mmio_read·"·"addr·0x%"PRIx64"·size·%d"·"\n",·addr,·size);

3032

············qemu_log("pci_nvme_mmio_read·"·"addr·0x%"PRIx64"·size·%d"·"\n",·addr,·size);

3033

#line·3035·"trace/trace-hw_nvme.h"

3033

#line·3035·"trace/trace-hw_nvme.h"

3034

········}

3034

········}

3035

····}

3035

····}

3036

}

3036

}

3037

static·inline·void·trace_pci_nvme_mmio_read(uint64_t·addr,·unsigned·size)

3037

static·inline·void·trace_pci_nvme_mmio_read(uint64_t·addr,·unsigned·size)

3049

static·inline·void·_nocheck__trace_pci_nvme_mmio_write(uint64_t·addr,·uint64_t·data,·unsigned·size)

3049

static·inline·void·_nocheck__trace_pci_nvme_mmio_write(uint64_t·addr,·uint64_t·data,·unsigned·size)

3050

{

3050

{

3051

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_WRITE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3051

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_WRITE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3052

········if·(message_with_timestamp)·{

3052

········if·(message_with_timestamp)·{

3053

············struct·timeval·_now;

3053

············struct·timeval·_now;

3054

············gettimeofday(&_now,·NULL);

3054

············gettimeofday(&_now,·NULL);

3056

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_write·"·"addr·0x%"PRIx64"·data·0x%"PRIx64"·size·%d"·"\n",

3056

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_write·"·"addr·0x%"PRIx64"·data·0x%"PRIx64"·size·%d"·"\n",

3057

·····················qemu_get_thread_id(),

3057

·····················qemu_get_thread_id(),

3058

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3058

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3059

·····················,·addr,·data,·size);

3059

·····················,·addr,·data,·size);

3060

#line·3062·"trace/trace-hw_nvme.h"

3060

#line·3062·"trace/trace-hw_nvme.h"

3061

········}·else·{

3061

········}·else·{

3063

············qemu_log("pci_nvme_mmio_write·"·"addr·0x%"PRIx64"·data·0x%"PRIx64"·size·%d"·"\n",·addr,·data,·size);

3063

············qemu_log("pci_nvme_mmio_write·"·"addr·0x%"PRIx64"·data·0x%"PRIx64"·size·%d"·"\n",·addr,·data,·size);

3064

#line·3066·"trace/trace-hw_nvme.h"

3064

#line·3066·"trace/trace-hw_nvme.h"

3065

········}

3065

········}

3066

····}

3066

····}

3067

}

3067

}

3068

static·inline·void·trace_pci_nvme_mmio_write(uint64_t·addr,·uint64_t·data,·unsigned·size)

3068

static·inline·void·trace_pci_nvme_mmio_write(uint64_t·addr,·uint64_t·data,·unsigned·size)

3080

static·inline·void·_nocheck__trace_pci_nvme_mmio_doorbell_cq(uint16_t·cqid,·uint16_t·new_head)

3080

static·inline·void·_nocheck__trace_pci_nvme_mmio_doorbell_cq(uint16_t·cqid,·uint16_t·new_head)

3081

{

3081

{

3082

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_DOORBELL_CQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3082

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_DOORBELL_CQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3083

········if·(message_with_timestamp)·{

3083

········if·(message_with_timestamp)·{

3084

············struct·timeval·_now;

3084

············struct·timeval·_now;

3085

············gettimeofday(&_now,·NULL);

3085

············gettimeofday(&_now,·NULL);

3087

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_doorbell_cq·"·"cqid·%"PRIu16"·new_head·%"PRIu16""·"\n",

3087

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_doorbell_cq·"·"cqid·%"PRIu16"·new_head·%"PRIu16""·"\n",

3088

·····················qemu_get_thread_id(),

3088

·····················qemu_get_thread_id(),

3089

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3089

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3090

·····················,·cqid,·new_head);

3090

·····················,·cqid,·new_head);

3091

#line·3093·"trace/trace-hw_nvme.h"

3091

#line·3093·"trace/trace-hw_nvme.h"

3092

········}·else·{

3092

········}·else·{

3094

············qemu_log("pci_nvme_mmio_doorbell_cq·"·"cqid·%"PRIu16"·new_head·%"PRIu16""·"\n",·cqid,·new_head);

3094

············qemu_log("pci_nvme_mmio_doorbell_cq·"·"cqid·%"PRIu16"·new_head·%"PRIu16""·"\n",·cqid,·new_head);

3095

#line·3097·"trace/trace-hw_nvme.h"

3095

#line·3097·"trace/trace-hw_nvme.h"

3096

········}

3096

········}

3097

····}

3097

····}

3098

}

3098

}

3099

static·inline·void·trace_pci_nvme_mmio_doorbell_cq(uint16_t·cqid,·uint16_t·new_head)

3099

static·inline·void·trace_pci_nvme_mmio_doorbell_cq(uint16_t·cqid,·uint16_t·new_head)

3111

static·inline·void·_nocheck__trace_pci_nvme_mmio_doorbell_sq(uint16_t·sqid,·uint16_t·new_tail)

3111

static·inline·void·_nocheck__trace_pci_nvme_mmio_doorbell_sq(uint16_t·sqid,·uint16_t·new_tail)

3112

{

3112

{

3113

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_DOORBELL_SQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3113

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_DOORBELL_SQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3114

········if·(message_with_timestamp)·{

3114

········if·(message_with_timestamp)·{

3115

············struct·timeval·_now;

3115

············struct·timeval·_now;

3116

············gettimeofday(&_now,·NULL);

3116

············gettimeofday(&_now,·NULL);

3118

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_doorbell_sq·"·"sqid·%"PRIu16"·new_tail·%"PRIu16""·"\n",

3118

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_doorbell_sq·"·"sqid·%"PRIu16"·new_tail·%"PRIu16""·"\n",

3119

·····················qemu_get_thread_id(),

3119

·····················qemu_get_thread_id(),

3120

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3120

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3121

·····················,·sqid,·new_tail);

3121

·····················,·sqid,·new_tail);

3122

#line·3124·"trace/trace-hw_nvme.h"

3122

#line·3124·"trace/trace-hw_nvme.h"

3123

········}·else·{

3123

········}·else·{

3125

············qemu_log("pci_nvme_mmio_doorbell_sq·"·"sqid·%"PRIu16"·new_tail·%"PRIu16""·"\n",·sqid,·new_tail);

3125

············qemu_log("pci_nvme_mmio_doorbell_sq·"·"sqid·%"PRIu16"·new_tail·%"PRIu16""·"\n",·sqid,·new_tail);

3126

#line·3128·"trace/trace-hw_nvme.h"

3126

#line·3128·"trace/trace-hw_nvme.h"

3127

········}

3127

········}

3128

····}

3128

····}

3129

}

3129

}

3130

static·inline·void·trace_pci_nvme_mmio_doorbell_sq(uint16_t·sqid,·uint16_t·new_tail)

3130

static·inline·void·trace_pci_nvme_mmio_doorbell_sq(uint16_t·sqid,·uint16_t·new_tail)

3142

static·inline·void·_nocheck__trace_pci_nvme_mmio_intm_set(uint64_t·data,·uint64_t·new_mask)

3142

static·inline·void·_nocheck__trace_pci_nvme_mmio_intm_set(uint64_t·data,·uint64_t·new_mask)

3143

{

3143

{

3144

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_INTM_SET)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3144

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_INTM_SET)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3145

········if·(message_with_timestamp)·{

3145

········if·(message_with_timestamp)·{

3146

············struct·timeval·_now;

3146

············struct·timeval·_now;

3147

············gettimeofday(&_now,·NULL);

3147

············gettimeofday(&_now,·NULL);

3149

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_intm_set·"·"wrote·MMIO,·interrupt·mask·set,·data=0x%"PRIx64",·new_mask=0x%"PRIx64""·"\n",

3149

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_intm_set·"·"wrote·MMIO,·interrupt·mask·set,·data=0x%"PRIx64",·new_mask=0x%"PRIx64""·"\n",

3150

·····················qemu_get_thread_id(),

3150

·····················qemu_get_thread_id(),

3151

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3151

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3152

·····················,·data,·new_mask);

3152

·····················,·data,·new_mask);

3153

#line·3155·"trace/trace-hw_nvme.h"

3153

#line·3155·"trace/trace-hw_nvme.h"

3154

········}·else·{

3154

········}·else·{

3156

············qemu_log("pci_nvme_mmio_intm_set·"·"wrote·MMIO,·interrupt·mask·set,·data=0x%"PRIx64",·new_mask=0x%"PRIx64""·"\n",·data,·new_mask);

3156

············qemu_log("pci_nvme_mmio_intm_set·"·"wrote·MMIO,·interrupt·mask·set,·data=0x%"PRIx64",·new_mask=0x%"PRIx64""·"\n",·data,·new_mask);

3157

#line·3159·"trace/trace-hw_nvme.h"

3157

#line·3159·"trace/trace-hw_nvme.h"

3158

········}

3158

········}

3159

····}

3159

····}

3160

}

3160

}

3161

static·inline·void·trace_pci_nvme_mmio_intm_set(uint64_t·data,·uint64_t·new_mask)

3161

static·inline·void·trace_pci_nvme_mmio_intm_set(uint64_t·data,·uint64_t·new_mask)

3173

static·inline·void·_nocheck__trace_pci_nvme_mmio_intm_clr(uint64_t·data,·uint64_t·new_mask)

3173

static·inline·void·_nocheck__trace_pci_nvme_mmio_intm_clr(uint64_t·data,·uint64_t·new_mask)

3174

{

3174

{

3175

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_INTM_CLR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3175

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_INTM_CLR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3176

········if·(message_with_timestamp)·{

3176

········if·(message_with_timestamp)·{

3177

············struct·timeval·_now;

3177

············struct·timeval·_now;

3178

············gettimeofday(&_now,·NULL);

3178

············gettimeofday(&_now,·NULL);

3180

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_intm_clr·"·"wrote·MMIO,·interrupt·mask·clr,·data=0x%"PRIx64",·new_mask=0x%"PRIx64""·"\n",

3180

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_intm_clr·"·"wrote·MMIO,·interrupt·mask·clr,·data=0x%"PRIx64",·new_mask=0x%"PRIx64""·"\n",

3181

·····················qemu_get_thread_id(),

3181

·····················qemu_get_thread_id(),

3182

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3182

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3183

·····················,·data,·new_mask);

3183

·····················,·data,·new_mask);

3184

#line·3186·"trace/trace-hw_nvme.h"

3184

#line·3186·"trace/trace-hw_nvme.h"

3185

········}·else·{

3185

········}·else·{

3187

············qemu_log("pci_nvme_mmio_intm_clr·"·"wrote·MMIO,·interrupt·mask·clr,·data=0x%"PRIx64",·new_mask=0x%"PRIx64""·"\n",·data,·new_mask);

3187

············qemu_log("pci_nvme_mmio_intm_clr·"·"wrote·MMIO,·interrupt·mask·clr,·data=0x%"PRIx64",·new_mask=0x%"PRIx64""·"\n",·data,·new_mask);

3188

#line·3190·"trace/trace-hw_nvme.h"

3188

#line·3190·"trace/trace-hw_nvme.h"

3189

········}

3189

········}

3190

····}

3190

····}

3191

}

3191

}

3192

static·inline·void·trace_pci_nvme_mmio_intm_clr(uint64_t·data,·uint64_t·new_mask)

3192

static·inline·void·trace_pci_nvme_mmio_intm_clr(uint64_t·data,·uint64_t·new_mask)

3204

static·inline·void·_nocheck__trace_pci_nvme_mmio_cfg(uint64_t·data)

3204

static·inline·void·_nocheck__trace_pci_nvme_mmio_cfg(uint64_t·data)

3205

{

3205

{

3206

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_CFG)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3206

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_CFG)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3207

········if·(message_with_timestamp)·{

3207

········if·(message_with_timestamp)·{

3208

············struct·timeval·_now;

3208

············struct·timeval·_now;

3209

············gettimeofday(&_now,·NULL);

3209

············gettimeofday(&_now,·NULL);

3211

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_cfg·"·"wrote·MMIO,·config·controller·config=0x%"PRIx64""·"\n",

3211

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_cfg·"·"wrote·MMIO,·config·controller·config=0x%"PRIx64""·"\n",

3212

·····················qemu_get_thread_id(),

3212

·····················qemu_get_thread_id(),

3213

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3213

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3214

·····················,·data);

3214

·····················,·data);

3215

#line·3217·"trace/trace-hw_nvme.h"

3215

#line·3217·"trace/trace-hw_nvme.h"

3216

········}·else·{

3216

········}·else·{

3218

············qemu_log("pci_nvme_mmio_cfg·"·"wrote·MMIO,·config·controller·config=0x%"PRIx64""·"\n",·data);

3218

············qemu_log("pci_nvme_mmio_cfg·"·"wrote·MMIO,·config·controller·config=0x%"PRIx64""·"\n",·data);

3219

#line·3221·"trace/trace-hw_nvme.h"

3219

#line·3221·"trace/trace-hw_nvme.h"

3220

········}

3220

········}

3221

····}

3221

····}

3222

}

3222

}

3223

static·inline·void·trace_pci_nvme_mmio_cfg(uint64_t·data)

3223

static·inline·void·trace_pci_nvme_mmio_cfg(uint64_t·data)

3235

static·inline·void·_nocheck__trace_pci_nvme_mmio_aqattr(uint64_t·data)

3235

static·inline·void·_nocheck__trace_pci_nvme_mmio_aqattr(uint64_t·data)

3236

{

3236

{

3237

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_AQATTR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3237

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_AQATTR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3238

········if·(message_with_timestamp)·{

3238

········if·(message_with_timestamp)·{

3239

············struct·timeval·_now;

3239

············struct·timeval·_now;

3240

············gettimeofday(&_now,·NULL);

3240

············gettimeofday(&_now,·NULL);

3242

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_aqattr·"·"wrote·MMIO,·admin·queue·attributes=0x%"PRIx64""·"\n",

3242

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_aqattr·"·"wrote·MMIO,·admin·queue·attributes=0x%"PRIx64""·"\n",

3243

·····················qemu_get_thread_id(),

3243

·····················qemu_get_thread_id(),

3244

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3244

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3245

·····················,·data);

3245

·····················,·data);

3246

#line·3248·"trace/trace-hw_nvme.h"

3246

#line·3248·"trace/trace-hw_nvme.h"

3247

········}·else·{

3247

········}·else·{

3249

············qemu_log("pci_nvme_mmio_aqattr·"·"wrote·MMIO,·admin·queue·attributes=0x%"PRIx64""·"\n",·data);

3249

············qemu_log("pci_nvme_mmio_aqattr·"·"wrote·MMIO,·admin·queue·attributes=0x%"PRIx64""·"\n",·data);

3250

#line·3252·"trace/trace-hw_nvme.h"

3250

#line·3252·"trace/trace-hw_nvme.h"

3251

········}

3251

········}

3252

····}

3252

····}

3253

}

3253

}

3254

static·inline·void·trace_pci_nvme_mmio_aqattr(uint64_t·data)

3254

static·inline·void·trace_pci_nvme_mmio_aqattr(uint64_t·data)

3266

static·inline·void·_nocheck__trace_pci_nvme_mmio_asqaddr(uint64_t·data)

3266

static·inline·void·_nocheck__trace_pci_nvme_mmio_asqaddr(uint64_t·data)

3267

{

3267

{

3268

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_ASQADDR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3268

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_ASQADDR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3269

········if·(message_with_timestamp)·{

3269

········if·(message_with_timestamp)·{

3270

············struct·timeval·_now;

3270

············struct·timeval·_now;

3271

············gettimeofday(&_now,·NULL);

3271

············gettimeofday(&_now,·NULL);

3273

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_asqaddr·"·"wrote·MMIO,·admin·submission·queue·address=0x%"PRIx64""·"\n",

3273

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_asqaddr·"·"wrote·MMIO,·admin·submission·queue·address=0x%"PRIx64""·"\n",

3274

·····················qemu_get_thread_id(),

3274

·····················qemu_get_thread_id(),

3275

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3275

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3276

·····················,·data);

3276

·····················,·data);

3277

#line·3279·"trace/trace-hw_nvme.h"

3277

#line·3279·"trace/trace-hw_nvme.h"

3278

········}·else·{

3278

········}·else·{

3280

············qemu_log("pci_nvme_mmio_asqaddr·"·"wrote·MMIO,·admin·submission·queue·address=0x%"PRIx64""·"\n",·data);

3280

············qemu_log("pci_nvme_mmio_asqaddr·"·"wrote·MMIO,·admin·submission·queue·address=0x%"PRIx64""·"\n",·data);

3281

#line·3283·"trace/trace-hw_nvme.h"

3281

#line·3283·"trace/trace-hw_nvme.h"

3282

········}

3282

········}

3283

····}

3283

····}

3284

}

3284

}

3285

static·inline·void·trace_pci_nvme_mmio_asqaddr(uint64_t·data)

3285

static·inline·void·trace_pci_nvme_mmio_asqaddr(uint64_t·data)

3297

static·inline·void·_nocheck__trace_pci_nvme_mmio_acqaddr(uint64_t·data)

3297

static·inline·void·_nocheck__trace_pci_nvme_mmio_acqaddr(uint64_t·data)

3298

{

3298

{

3299

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_ACQADDR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3299

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_ACQADDR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3300

········if·(message_with_timestamp)·{

3300

········if·(message_with_timestamp)·{

3301

············struct·timeval·_now;

3301

············struct·timeval·_now;

3302

············gettimeofday(&_now,·NULL);

3302

············gettimeofday(&_now,·NULL);

3304

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_acqaddr·"·"wrote·MMIO,·admin·completion·queue·address=0x%"PRIx64""·"\n",

3304

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_acqaddr·"·"wrote·MMIO,·admin·completion·queue·address=0x%"PRIx64""·"\n",

3305

·····················qemu_get_thread_id(),

3305

·····················qemu_get_thread_id(),

3306

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3306

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3307

·····················,·data);

3307

·····················,·data);

3308

#line·3310·"trace/trace-hw_nvme.h"

3308

#line·3310·"trace/trace-hw_nvme.h"

3309

········}·else·{

3309

········}·else·{

3311

············qemu_log("pci_nvme_mmio_acqaddr·"·"wrote·MMIO,·admin·completion·queue·address=0x%"PRIx64""·"\n",·data);

3311

············qemu_log("pci_nvme_mmio_acqaddr·"·"wrote·MMIO,·admin·completion·queue·address=0x%"PRIx64""·"\n",·data);

3312

#line·3314·"trace/trace-hw_nvme.h"

3312

#line·3314·"trace/trace-hw_nvme.h"

3313

········}

3313

········}

3314

····}

3314

····}

3315

}

3315

}

3316

static·inline·void·trace_pci_nvme_mmio_acqaddr(uint64_t·data)

3316

static·inline·void·trace_pci_nvme_mmio_acqaddr(uint64_t·data)

3328

static·inline·void·_nocheck__trace_pci_nvme_mmio_asqaddr_hi(uint64_t·data,·uint64_t·new_addr)

3328

static·inline·void·_nocheck__trace_pci_nvme_mmio_asqaddr_hi(uint64_t·data,·uint64_t·new_addr)

3329

{

3329

{

3330

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_ASQADDR_HI)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3330

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_ASQADDR_HI)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3331

········if·(message_with_timestamp)·{

3331

········if·(message_with_timestamp)·{

3332

············struct·timeval·_now;

3332

············struct·timeval·_now;

3333

············gettimeofday(&_now,·NULL);

3333

············gettimeofday(&_now,·NULL);

3335

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_asqaddr_hi·"·"wrote·MMIO,·admin·submission·queue·high·half=0x%"PRIx64",·new_address=0x%"PRIx64""·"\n",

3335

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_asqaddr_hi·"·"wrote·MMIO,·admin·submission·queue·high·half=0x%"PRIx64",·new_address=0x%"PRIx64""·"\n",

3336

·····················qemu_get_thread_id(),

3336

·····················qemu_get_thread_id(),

3337

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3337

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3338

·····················,·data,·new_addr);

3338

·····················,·data,·new_addr);

3339

#line·3341·"trace/trace-hw_nvme.h"

3339

#line·3341·"trace/trace-hw_nvme.h"

3340

········}·else·{

3340

········}·else·{

3342

············qemu_log("pci_nvme_mmio_asqaddr_hi·"·"wrote·MMIO,·admin·submission·queue·high·half=0x%"PRIx64",·new_address=0x%"PRIx64""·"\n",·data,·new_addr);

3342

············qemu_log("pci_nvme_mmio_asqaddr_hi·"·"wrote·MMIO,·admin·submission·queue·high·half=0x%"PRIx64",·new_address=0x%"PRIx64""·"\n",·data,·new_addr);

3343

#line·3345·"trace/trace-hw_nvme.h"

3343

#line·3345·"trace/trace-hw_nvme.h"

3344

········}

3344

········}

3345

····}

3345

····}

3346

}

3346

}

3347

static·inline·void·trace_pci_nvme_mmio_asqaddr_hi(uint64_t·data,·uint64_t·new_addr)

3347

static·inline·void·trace_pci_nvme_mmio_asqaddr_hi(uint64_t·data,·uint64_t·new_addr)

3359

static·inline·void·_nocheck__trace_pci_nvme_mmio_acqaddr_hi(uint64_t·data,·uint64_t·new_addr)

3359

static·inline·void·_nocheck__trace_pci_nvme_mmio_acqaddr_hi(uint64_t·data,·uint64_t·new_addr)

3360

{

3360

{

3361

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_ACQADDR_HI)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3361

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_ACQADDR_HI)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3362

········if·(message_with_timestamp)·{

3362

········if·(message_with_timestamp)·{

3363

············struct·timeval·_now;

3363

············struct·timeval·_now;

3364

············gettimeofday(&_now,·NULL);

3364

············gettimeofday(&_now,·NULL);

3366

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_acqaddr_hi·"·"wrote·MMIO,·admin·completion·queue·high·half=0x%"PRIx64",·new_address=0x%"PRIx64""·"\n",

3366

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_acqaddr_hi·"·"wrote·MMIO,·admin·completion·queue·high·half=0x%"PRIx64",·new_address=0x%"PRIx64""·"\n",

3367

·····················qemu_get_thread_id(),

3367

·····················qemu_get_thread_id(),

3368

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3368

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3369

·····················,·data,·new_addr);

3369

·····················,·data,·new_addr);

3370

#line·3372·"trace/trace-hw_nvme.h"

3370

#line·3372·"trace/trace-hw_nvme.h"

3371

········}·else·{

3371

········}·else·{

3373

············qemu_log("pci_nvme_mmio_acqaddr_hi·"·"wrote·MMIO,·admin·completion·queue·high·half=0x%"PRIx64",·new_address=0x%"PRIx64""·"\n",·data,·new_addr);

3373

············qemu_log("pci_nvme_mmio_acqaddr_hi·"·"wrote·MMIO,·admin·completion·queue·high·half=0x%"PRIx64",·new_address=0x%"PRIx64""·"\n",·data,·new_addr);

3374

#line·3376·"trace/trace-hw_nvme.h"

3374

#line·3376·"trace/trace-hw_nvme.h"

3375

········}

3375

········}

3376

····}

3376

····}

3377

}

3377

}

3378

static·inline·void·trace_pci_nvme_mmio_acqaddr_hi(uint64_t·data,·uint64_t·new_addr)

3378

static·inline·void·trace_pci_nvme_mmio_acqaddr_hi(uint64_t·data,·uint64_t·new_addr)

3390

static·inline·void·_nocheck__trace_pci_nvme_mmio_start_success(void)

3390

static·inline·void·_nocheck__trace_pci_nvme_mmio_start_success(void)

3391

{

3391

{

3392

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_START_SUCCESS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3392

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_START_SUCCESS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3393

········if·(message_with_timestamp)·{

3393

········if·(message_with_timestamp)·{

3394

············struct·timeval·_now;

3394

············struct·timeval·_now;

3395

············gettimeofday(&_now,·NULL);

3395

············gettimeofday(&_now,·NULL);

3397

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_start_success·"·"setting·controller·enable·bit·succeeded"·"\n",

3397

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_start_success·"·"setting·controller·enable·bit·succeeded"·"\n",

3398

·····················qemu_get_thread_id(),

3398

·····················qemu_get_thread_id(),

3399

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3399

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3400

·····················);

3400

·····················);

3401

#line·3403·"trace/trace-hw_nvme.h"

3401

#line·3403·"trace/trace-hw_nvme.h"

3402

········}·else·{

3402

········}·else·{

3404

············qemu_log("pci_nvme_mmio_start_success·"·"setting·controller·enable·bit·succeeded"·"\n");

3404

············qemu_log("pci_nvme_mmio_start_success·"·"setting·controller·enable·bit·succeeded"·"\n");

3405

#line·3407·"trace/trace-hw_nvme.h"

3405

#line·3407·"trace/trace-hw_nvme.h"

3406

········}

3406

········}

3407

····}

3407

····}

3408

}

3408

}

3409

static·inline·void·trace_pci_nvme_mmio_start_success(void)

3409

static·inline·void·trace_pci_nvme_mmio_start_success(void)

3421

static·inline·void·_nocheck__trace_pci_nvme_mmio_stopped(void)

3421

static·inline·void·_nocheck__trace_pci_nvme_mmio_stopped(void)

3422

{

3422

{

3423

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_STOPPED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3423

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_STOPPED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3424

········if·(message_with_timestamp)·{

3424

········if·(message_with_timestamp)·{

3425

············struct·timeval·_now;

3425

············struct·timeval·_now;

3426

············gettimeofday(&_now,·NULL);

3426

············gettimeofday(&_now,·NULL);

3428

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_stopped·"·"cleared·controller·enable·bit"·"\n",

3428

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_stopped·"·"cleared·controller·enable·bit"·"\n",

3429

·····················qemu_get_thread_id(),

3429

·····················qemu_get_thread_id(),

3430

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3430

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3431

·····················);

3431

·····················);

3432

#line·3434·"trace/trace-hw_nvme.h"

3432

#line·3434·"trace/trace-hw_nvme.h"

3433

········}·else·{

3433

········}·else·{

3435

············qemu_log("pci_nvme_mmio_stopped·"·"cleared·controller·enable·bit"·"\n");

3435

············qemu_log("pci_nvme_mmio_stopped·"·"cleared·controller·enable·bit"·"\n");

3436

#line·3438·"trace/trace-hw_nvme.h"

3436

#line·3438·"trace/trace-hw_nvme.h"

3437

········}

3437

········}

3438

····}

3438

····}

3439

}

3439

}

3440

static·inline·void·trace_pci_nvme_mmio_stopped(void)

3440

static·inline·void·trace_pci_nvme_mmio_stopped(void)

3452

static·inline·void·_nocheck__trace_pci_nvme_mmio_shutdown_set(void)

3452

static·inline·void·_nocheck__trace_pci_nvme_mmio_shutdown_set(void)

3453

{

3453

{

3454

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_SHUTDOWN_SET)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3454

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_SHUTDOWN_SET)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3455

········if·(message_with_timestamp)·{

3455

········if·(message_with_timestamp)·{

3456

············struct·timeval·_now;

3456

············struct·timeval·_now;

3457

············gettimeofday(&_now,·NULL);

3457

············gettimeofday(&_now,·NULL);

3459

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_shutdown_set·"·"shutdown·bit·set"·"\n",

3459

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_shutdown_set·"·"shutdown·bit·set"·"\n",

3460

·····················qemu_get_thread_id(),

3460

·····················qemu_get_thread_id(),

3461

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3461

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3462

·····················);

3462

·····················);

3463

#line·3465·"trace/trace-hw_nvme.h"

3463

#line·3465·"trace/trace-hw_nvme.h"

3464

········}·else·{

3464

········}·else·{

3466

············qemu_log("pci_nvme_mmio_shutdown_set·"·"shutdown·bit·set"·"\n");

3466

············qemu_log("pci_nvme_mmio_shutdown_set·"·"shutdown·bit·set"·"\n");

3467

#line·3469·"trace/trace-hw_nvme.h"

3467

#line·3469·"trace/trace-hw_nvme.h"

3468

········}

3468

········}

3469

····}

3469

····}

3470

}

3470

}

3471

static·inline·void·trace_pci_nvme_mmio_shutdown_set(void)

3471

static·inline·void·trace_pci_nvme_mmio_shutdown_set(void)

3483

static·inline·void·_nocheck__trace_pci_nvme_mmio_shutdown_cleared(void)

3483

static·inline·void·_nocheck__trace_pci_nvme_mmio_shutdown_cleared(void)

3484

{

3484

{

3485

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_SHUTDOWN_CLEARED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3485

····if·(trace_event_get_state(TRACE_PCI_NVME_MMIO_SHUTDOWN_CLEARED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3486

········if·(message_with_timestamp)·{

3486

········if·(message_with_timestamp)·{

3487

············struct·timeval·_now;

3487

············struct·timeval·_now;

3488

············gettimeofday(&_now,·NULL);

3488

············gettimeofday(&_now,·NULL);

3490

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_shutdown_cleared·"·"shutdown·bit·cleared"·"\n",

3490

············qemu_log("%d@%zu.%06zu:pci_nvme_mmio_shutdown_cleared·"·"shutdown·bit·cleared"·"\n",

3491

·····················qemu_get_thread_id(),

3491

·····················qemu_get_thread_id(),

3492

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3492

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3493

·····················);

3493

·····················);

3494

#line·3496·"trace/trace-hw_nvme.h"

3494

#line·3496·"trace/trace-hw_nvme.h"

3495

········}·else·{

3495

········}·else·{

3497

············qemu_log("pci_nvme_mmio_shutdown_cleared·"·"shutdown·bit·cleared"·"\n");

3497

············qemu_log("pci_nvme_mmio_shutdown_cleared·"·"shutdown·bit·cleared"·"\n");

3498

#line·3500·"trace/trace-hw_nvme.h"

3498

#line·3500·"trace/trace-hw_nvme.h"

3499

········}

3499

········}

3500

····}

3500

····}

3501

}

3501

}

3502

static·inline·void·trace_pci_nvme_mmio_shutdown_cleared(void)

3502

static·inline·void·trace_pci_nvme_mmio_shutdown_cleared(void)

3514

static·inline·void·_nocheck__trace_pci_nvme_open_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3514

static·inline·void·_nocheck__trace_pci_nvme_open_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3515

{

3515

{

3516

····if·(trace_event_get_state(TRACE_PCI_NVME_OPEN_ZONE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3516

····if·(trace_event_get_state(TRACE_PCI_NVME_OPEN_ZONE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3517

········if·(message_with_timestamp)·{

3517

········if·(message_with_timestamp)·{

3518

············struct·timeval·_now;

3518

············struct·timeval·_now;

3519

············gettimeofday(&_now,·NULL);

3519

············gettimeofday(&_now,·NULL);

3521

············qemu_log("%d@%zu.%06zu:pci_nvme_open_zone·"·"open·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",

3521

············qemu_log("%d@%zu.%06zu:pci_nvme_open_zone·"·"open·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",

3522

·····················qemu_get_thread_id(),

3522

·····················qemu_get_thread_id(),

3523

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3523

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3524

·····················,·slba,·zone_idx,·all);

3524

·····················,·slba,·zone_idx,·all);

3525

#line·3527·"trace/trace-hw_nvme.h"

3525

#line·3527·"trace/trace-hw_nvme.h"

3526

········}·else·{

3526

········}·else·{

3528

············qemu_log("pci_nvme_open_zone·"·"open·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",·slba,·zone_idx,·all);

3528

············qemu_log("pci_nvme_open_zone·"·"open·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",·slba,·zone_idx,·all);

3529

#line·3531·"trace/trace-hw_nvme.h"

3529

#line·3531·"trace/trace-hw_nvme.h"

3530

········}

3530

········}

3531

····}

3531

····}

3532

}

3532

}

3533

static·inline·void·trace_pci_nvme_open_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3533

static·inline·void·trace_pci_nvme_open_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3545

static·inline·void·_nocheck__trace_pci_nvme_close_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3545

static·inline·void·_nocheck__trace_pci_nvme_close_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3546

{

3546

{

3547

····if·(trace_event_get_state(TRACE_PCI_NVME_CLOSE_ZONE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3547

····if·(trace_event_get_state(TRACE_PCI_NVME_CLOSE_ZONE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3548

········if·(message_with_timestamp)·{

3548

········if·(message_with_timestamp)·{

3549

············struct·timeval·_now;

3549

············struct·timeval·_now;

3550

············gettimeofday(&_now,·NULL);

3550

············gettimeofday(&_now,·NULL);

3552

············qemu_log("%d@%zu.%06zu:pci_nvme_close_zone·"·"close·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",

3552

············qemu_log("%d@%zu.%06zu:pci_nvme_close_zone·"·"close·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",

3553

·····················qemu_get_thread_id(),

3553

·····················qemu_get_thread_id(),

3554

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3554

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3555

·····················,·slba,·zone_idx,·all);

3555

·····················,·slba,·zone_idx,·all);

3556

#line·3558·"trace/trace-hw_nvme.h"

3556

#line·3558·"trace/trace-hw_nvme.h"

3557

········}·else·{

3557

········}·else·{

3559

············qemu_log("pci_nvme_close_zone·"·"close·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",·slba,·zone_idx,·all);

3559

············qemu_log("pci_nvme_close_zone·"·"close·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",·slba,·zone_idx,·all);

3560

#line·3562·"trace/trace-hw_nvme.h"

3560

#line·3562·"trace/trace-hw_nvme.h"

3561

········}

3561

········}

3562

····}

3562

····}

3563

}

3563

}

3564

static·inline·void·trace_pci_nvme_close_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3564

static·inline·void·trace_pci_nvme_close_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3576

static·inline·void·_nocheck__trace_pci_nvme_finish_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3576

static·inline·void·_nocheck__trace_pci_nvme_finish_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3577

{

3577

{

3578

····if·(trace_event_get_state(TRACE_PCI_NVME_FINISH_ZONE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3578

····if·(trace_event_get_state(TRACE_PCI_NVME_FINISH_ZONE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3579

········if·(message_with_timestamp)·{

3579

········if·(message_with_timestamp)·{

3580

············struct·timeval·_now;

3580

············struct·timeval·_now;

3581

············gettimeofday(&_now,·NULL);

3581

············gettimeofday(&_now,·NULL);

3583

············qemu_log("%d@%zu.%06zu:pci_nvme_finish_zone·"·"finish·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",

3583

············qemu_log("%d@%zu.%06zu:pci_nvme_finish_zone·"·"finish·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",

3584

·····················qemu_get_thread_id(),

3584

·····················qemu_get_thread_id(),

3585

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3585

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3586

·····················,·slba,·zone_idx,·all);

3586

·····················,·slba,·zone_idx,·all);

3587

#line·3589·"trace/trace-hw_nvme.h"

3587

#line·3589·"trace/trace-hw_nvme.h"

3588

········}·else·{

3588

········}·else·{

3590

············qemu_log("pci_nvme_finish_zone·"·"finish·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",·slba,·zone_idx,·all);

3590

············qemu_log("pci_nvme_finish_zone·"·"finish·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",·slba,·zone_idx,·all);

3591

#line·3593·"trace/trace-hw_nvme.h"

3591

#line·3593·"trace/trace-hw_nvme.h"

3592

········}

3592

········}

3593

····}

3593

····}

3594

}

3594

}

3595

static·inline·void·trace_pci_nvme_finish_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3595

static·inline·void·trace_pci_nvme_finish_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3607

static·inline·void·_nocheck__trace_pci_nvme_reset_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3607

static·inline·void·_nocheck__trace_pci_nvme_reset_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3608

{

3608

{

3609

····if·(trace_event_get_state(TRACE_PCI_NVME_RESET_ZONE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3609

····if·(trace_event_get_state(TRACE_PCI_NVME_RESET_ZONE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3610

········if·(message_with_timestamp)·{

3610

········if·(message_with_timestamp)·{

3611

············struct·timeval·_now;

3611

············struct·timeval·_now;

3612

············gettimeofday(&_now,·NULL);

3612

············gettimeofday(&_now,·NULL);

3614

············qemu_log("%d@%zu.%06zu:pci_nvme_reset_zone·"·"reset·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",

3614

············qemu_log("%d@%zu.%06zu:pci_nvme_reset_zone·"·"reset·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",

3615

·····················qemu_get_thread_id(),

3615

·····················qemu_get_thread_id(),

3616

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3616

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3617

·····················,·slba,·zone_idx,·all);

3617

·····················,·slba,·zone_idx,·all);

3618

#line·3620·"trace/trace-hw_nvme.h"

3618

#line·3620·"trace/trace-hw_nvme.h"

3619

········}·else·{

3619

········}·else·{

3621

············qemu_log("pci_nvme_reset_zone·"·"reset·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",·slba,·zone_idx,·all);

3621

············qemu_log("pci_nvme_reset_zone·"·"reset·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",·slba,·zone_idx,·all);

3622

#line·3624·"trace/trace-hw_nvme.h"

3622

#line·3624·"trace/trace-hw_nvme.h"

3623

········}

3623

········}

3624

····}

3624

····}

3625

}

3625

}

3626

static·inline·void·trace_pci_nvme_reset_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3626

static·inline·void·trace_pci_nvme_reset_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3638

static·inline·void·_nocheck__trace_pci_nvme_zns_zone_reset(uint64_t·zslba)

3638

static·inline·void·_nocheck__trace_pci_nvme_zns_zone_reset(uint64_t·zslba)

3639

{

3639

{

3640

····if·(trace_event_get_state(TRACE_PCI_NVME_ZNS_ZONE_RESET)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3640

····if·(trace_event_get_state(TRACE_PCI_NVME_ZNS_ZONE_RESET)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3641

········if·(message_with_timestamp)·{

3641

········if·(message_with_timestamp)·{

3642

············struct·timeval·_now;

3642

············struct·timeval·_now;

3643

············gettimeofday(&_now,·NULL);

3643

············gettimeofday(&_now,·NULL);

3645

············qemu_log("%d@%zu.%06zu:pci_nvme_zns_zone_reset·"·"zslba·0x%"PRIx64""·"\n",

3645

············qemu_log("%d@%zu.%06zu:pci_nvme_zns_zone_reset·"·"zslba·0x%"PRIx64""·"\n",

3646

·····················qemu_get_thread_id(),

3646

·····················qemu_get_thread_id(),

3647

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3647

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3648

·····················,·zslba);

3648

·····················,·zslba);

3649

#line·3651·"trace/trace-hw_nvme.h"

3649

#line·3651·"trace/trace-hw_nvme.h"

3650

········}·else·{

3650

········}·else·{

3652

············qemu_log("pci_nvme_zns_zone_reset·"·"zslba·0x%"PRIx64""·"\n",·zslba);

3652

············qemu_log("pci_nvme_zns_zone_reset·"·"zslba·0x%"PRIx64""·"\n",·zslba);

3653

#line·3655·"trace/trace-hw_nvme.h"

3653

#line·3655·"trace/trace-hw_nvme.h"

3654

········}

3654

········}

3655

····}

3655

····}

3656

}

3656

}

3657

static·inline·void·trace_pci_nvme_zns_zone_reset(uint64_t·zslba)

3657

static·inline·void·trace_pci_nvme_zns_zone_reset(uint64_t·zslba)

3669

static·inline·void·_nocheck__trace_pci_nvme_offline_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3669

static·inline·void·_nocheck__trace_pci_nvme_offline_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3670

{

3670

{

3671

····if·(trace_event_get_state(TRACE_PCI_NVME_OFFLINE_ZONE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3671

····if·(trace_event_get_state(TRACE_PCI_NVME_OFFLINE_ZONE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3672

········if·(message_with_timestamp)·{

3672

········if·(message_with_timestamp)·{

3673

············struct·timeval·_now;

3673

············struct·timeval·_now;

3674

············gettimeofday(&_now,·NULL);

3674

············gettimeofday(&_now,·NULL);

3676

············qemu_log("%d@%zu.%06zu:pci_nvme_offline_zone·"·"offline·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",

3676

············qemu_log("%d@%zu.%06zu:pci_nvme_offline_zone·"·"offline·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",

3677

·····················qemu_get_thread_id(),

3677

·····················qemu_get_thread_id(),

3678

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3678

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3679

·····················,·slba,·zone_idx,·all);

3679

·····················,·slba,·zone_idx,·all);

3680

#line·3682·"trace/trace-hw_nvme.h"

3680

#line·3682·"trace/trace-hw_nvme.h"

3681

········}·else·{

3681

········}·else·{

3683

············qemu_log("pci_nvme_offline_zone·"·"offline·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",·slba,·zone_idx,·all);

3683

············qemu_log("pci_nvme_offline_zone·"·"offline·zone,·slba=%"PRIu64",·idx=%"PRIu32",·all=%"PRIi32""·"\n",·slba,·zone_idx,·all);

3684

#line·3686·"trace/trace-hw_nvme.h"

3684

#line·3686·"trace/trace-hw_nvme.h"

3685

········}

3685

········}

3686

····}

3686

····}

3687

}

3687

}

3688

static·inline·void·trace_pci_nvme_offline_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3688

static·inline·void·trace_pci_nvme_offline_zone(uint64_t·slba,·uint32_t·zone_idx,·int·all)

3700

static·inline·void·_nocheck__trace_pci_nvme_set_descriptor_extension(uint64_t·slba,·uint32_t·zone_idx)

3700

static·inline·void·_nocheck__trace_pci_nvme_set_descriptor_extension(uint64_t·slba,·uint32_t·zone_idx)

3701

{

3701

{

3702

····if·(trace_event_get_state(TRACE_PCI_NVME_SET_DESCRIPTOR_EXTENSION)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3702

····if·(trace_event_get_state(TRACE_PCI_NVME_SET_DESCRIPTOR_EXTENSION)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3703

········if·(message_with_timestamp)·{

3703

········if·(message_with_timestamp)·{

3704

············struct·timeval·_now;

3704

············struct·timeval·_now;

3705

············gettimeofday(&_now,·NULL);

3705

············gettimeofday(&_now,·NULL);

3707

············qemu_log("%d@%zu.%06zu:pci_nvme_set_descriptor_extension·"·"set·zone·descriptor·extension,·slba=%"PRIu64",·idx=%"PRIu32""·"\n",

3707

············qemu_log("%d@%zu.%06zu:pci_nvme_set_descriptor_extension·"·"set·zone·descriptor·extension,·slba=%"PRIu64",·idx=%"PRIu32""·"\n",

3708

·····················qemu_get_thread_id(),

3708

·····················qemu_get_thread_id(),

3709

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3709

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3710

·····················,·slba,·zone_idx);

3710

·····················,·slba,·zone_idx);

3711

#line·3713·"trace/trace-hw_nvme.h"

3711

#line·3713·"trace/trace-hw_nvme.h"

3712

········}·else·{

3712

········}·else·{

3714

············qemu_log("pci_nvme_set_descriptor_extension·"·"set·zone·descriptor·extension,·slba=%"PRIu64",·idx=%"PRIu32""·"\n",·slba,·zone_idx);

3714

············qemu_log("pci_nvme_set_descriptor_extension·"·"set·zone·descriptor·extension,·slba=%"PRIu64",·idx=%"PRIu32""·"\n",·slba,·zone_idx);

3715

#line·3717·"trace/trace-hw_nvme.h"

3715

#line·3717·"trace/trace-hw_nvme.h"

3716

········}

3716

········}

3717

····}

3717

····}

3718

}

3718

}

3719

static·inline·void·trace_pci_nvme_set_descriptor_extension(uint64_t·slba,·uint32_t·zone_idx)

3719

static·inline·void·trace_pci_nvme_set_descriptor_extension(uint64_t·slba,·uint32_t·zone_idx)

3731

static·inline·void·_nocheck__trace_pci_nvme_zd_extension_set(uint32_t·zone_idx)

3731

static·inline·void·_nocheck__trace_pci_nvme_zd_extension_set(uint32_t·zone_idx)

3732

{

3732

{

3733

····if·(trace_event_get_state(TRACE_PCI_NVME_ZD_EXTENSION_SET)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3733

····if·(trace_event_get_state(TRACE_PCI_NVME_ZD_EXTENSION_SET)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3734

········if·(message_with_timestamp)·{

3734

········if·(message_with_timestamp)·{

3735

············struct·timeval·_now;

3735

············struct·timeval·_now;

3736

············gettimeofday(&_now,·NULL);

3736

············gettimeofday(&_now,·NULL);

3738

············qemu_log("%d@%zu.%06zu:pci_nvme_zd_extension_set·"·"set·descriptor·extension·for·zone_idx=%"PRIu32""·"\n",

3738

············qemu_log("%d@%zu.%06zu:pci_nvme_zd_extension_set·"·"set·descriptor·extension·for·zone_idx=%"PRIu32""·"\n",

3739

·····················qemu_get_thread_id(),

3739

·····················qemu_get_thread_id(),

3740

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3740

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3741

·····················,·zone_idx);

3741

·····················,·zone_idx);

3742

#line·3744·"trace/trace-hw_nvme.h"

3742

#line·3744·"trace/trace-hw_nvme.h"

3743

········}·else·{

3743

········}·else·{

3745

············qemu_log("pci_nvme_zd_extension_set·"·"set·descriptor·extension·for·zone_idx=%"PRIu32""·"\n",·zone_idx);

3745

············qemu_log("pci_nvme_zd_extension_set·"·"set·descriptor·extension·for·zone_idx=%"PRIu32""·"\n",·zone_idx);

3746

#line·3748·"trace/trace-hw_nvme.h"

3746

#line·3748·"trace/trace-hw_nvme.h"

3747

········}

3747

········}

3748

····}

3748

····}

3749

}

3749

}

3750

static·inline·void·trace_pci_nvme_zd_extension_set(uint32_t·zone_idx)

3750

static·inline·void·trace_pci_nvme_zd_extension_set(uint32_t·zone_idx)

3762

static·inline·void·_nocheck__trace_pci_nvme_clear_ns_close(uint32_t·state,·uint64_t·slba)

3762

static·inline·void·_nocheck__trace_pci_nvme_clear_ns_close(uint32_t·state,·uint64_t·slba)

3763

{

3763

{

3764

····if·(trace_event_get_state(TRACE_PCI_NVME_CLEAR_NS_CLOSE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3764

····if·(trace_event_get_state(TRACE_PCI_NVME_CLEAR_NS_CLOSE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3765

········if·(message_with_timestamp)·{

3765

········if·(message_with_timestamp)·{

3766

············struct·timeval·_now;

3766

············struct·timeval·_now;

3767

············gettimeofday(&_now,·NULL);

3767

············gettimeofday(&_now,·NULL);

3769

············qemu_log("%d@%zu.%06zu:pci_nvme_clear_ns_close·"·"zone·state=%"PRIu32",·slba=%"PRIu64"·transitioned·to·Closed·state"·"\n",

3769

············qemu_log("%d@%zu.%06zu:pci_nvme_clear_ns_close·"·"zone·state=%"PRIu32",·slba=%"PRIu64"·transitioned·to·Closed·state"·"\n",

3770

·····················qemu_get_thread_id(),

3770

·····················qemu_get_thread_id(),

3771

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3771

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3772

·····················,·state,·slba);

3772

·····················,·state,·slba);

3773

#line·3775·"trace/trace-hw_nvme.h"

3773

#line·3775·"trace/trace-hw_nvme.h"

3774

········}·else·{

3774

········}·else·{

3776

············qemu_log("pci_nvme_clear_ns_close·"·"zone·state=%"PRIu32",·slba=%"PRIu64"·transitioned·to·Closed·state"·"\n",·state,·slba);

3776

············qemu_log("pci_nvme_clear_ns_close·"·"zone·state=%"PRIu32",·slba=%"PRIu64"·transitioned·to·Closed·state"·"\n",·state,·slba);

3777

#line·3779·"trace/trace-hw_nvme.h"

3777

#line·3779·"trace/trace-hw_nvme.h"

3778

········}

3778

········}

3779

····}

3779

····}

3780

}

3780

}

3781

static·inline·void·trace_pci_nvme_clear_ns_close(uint32_t·state,·uint64_t·slba)

3781

static·inline·void·trace_pci_nvme_clear_ns_close(uint32_t·state,·uint64_t·slba)

3793

static·inline·void·_nocheck__trace_pci_nvme_clear_ns_reset(uint32_t·state,·uint64_t·slba)

3793

static·inline·void·_nocheck__trace_pci_nvme_clear_ns_reset(uint32_t·state,·uint64_t·slba)

3794

{

3794

{

3795

····if·(trace_event_get_state(TRACE_PCI_NVME_CLEAR_NS_RESET)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3795

····if·(trace_event_get_state(TRACE_PCI_NVME_CLEAR_NS_RESET)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3796

········if·(message_with_timestamp)·{

3796

········if·(message_with_timestamp)·{

3797

············struct·timeval·_now;

3797

············struct·timeval·_now;

3798

············gettimeofday(&_now,·NULL);

3798

············gettimeofday(&_now,·NULL);

3800

············qemu_log("%d@%zu.%06zu:pci_nvme_clear_ns_reset·"·"zone·state=%"PRIu32",·slba=%"PRIu64"·transitioned·to·Empty·state"·"\n",

3800

············qemu_log("%d@%zu.%06zu:pci_nvme_clear_ns_reset·"·"zone·state=%"PRIu32",·slba=%"PRIu64"·transitioned·to·Empty·state"·"\n",

3801

·····················qemu_get_thread_id(),

3801

·····················qemu_get_thread_id(),

3802

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3802

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3803

·····················,·state,·slba);

3803

·····················,·state,·slba);

3804

#line·3806·"trace/trace-hw_nvme.h"

3804

#line·3806·"trace/trace-hw_nvme.h"

3805

········}·else·{

3805

········}·else·{

3807

············qemu_log("pci_nvme_clear_ns_reset·"·"zone·state=%"PRIu32",·slba=%"PRIu64"·transitioned·to·Empty·state"·"\n",·state,·slba);

3807

············qemu_log("pci_nvme_clear_ns_reset·"·"zone·state=%"PRIu32",·slba=%"PRIu64"·transitioned·to·Empty·state"·"\n",·state,·slba);

3808

#line·3810·"trace/trace-hw_nvme.h"

3808

#line·3810·"trace/trace-hw_nvme.h"

3809

········}

3809

········}

3810

····}

3810

····}

3811

}

3811

}

3812

static·inline·void·trace_pci_nvme_clear_ns_reset(uint32_t·state,·uint64_t·slba)

3812

static·inline·void·trace_pci_nvme_clear_ns_reset(uint32_t·state,·uint64_t·slba)

3824

static·inline·void·_nocheck__trace_pci_nvme_err_mdts(size_t·len)

3824

static·inline·void·_nocheck__trace_pci_nvme_err_mdts(size_t·len)

3825

{

3825

{

3826

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_MDTS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3826

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_MDTS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3827

········if·(message_with_timestamp)·{

3827

········if·(message_with_timestamp)·{

3828

············struct·timeval·_now;

3828

············struct·timeval·_now;

3829

············gettimeofday(&_now,·NULL);

3829

············gettimeofday(&_now,·NULL);

3831

············qemu_log("%d@%zu.%06zu:pci_nvme_err_mdts·"·"len·%zu"·"\n",

3831

············qemu_log("%d@%zu.%06zu:pci_nvme_err_mdts·"·"len·%zu"·"\n",

3832

·····················qemu_get_thread_id(),

3832

·····················qemu_get_thread_id(),

3833

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3833

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3834

·····················,·len);

3834

·····················,·len);

3835

#line·3837·"trace/trace-hw_nvme.h"

3835

#line·3837·"trace/trace-hw_nvme.h"

3836

········}·else·{

3836

········}·else·{

3838

············qemu_log("pci_nvme_err_mdts·"·"len·%zu"·"\n",·len);

3838

············qemu_log("pci_nvme_err_mdts·"·"len·%zu"·"\n",·len);

3839

#line·3841·"trace/trace-hw_nvme.h"

3839

#line·3841·"trace/trace-hw_nvme.h"

3840

········}

3840

········}

3841

····}

3841

····}

3842

}

3842

}

3843

static·inline·void·trace_pci_nvme_err_mdts(size_t·len)

3843

static·inline·void·trace_pci_nvme_err_mdts(size_t·len)

3855

static·inline·void·_nocheck__trace_pci_nvme_err_zasl(size_t·len)

3855

static·inline·void·_nocheck__trace_pci_nvme_err_zasl(size_t·len)

3856

{

3856

{

3857

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZASL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3857

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZASL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3858

········if·(message_with_timestamp)·{

3858

········if·(message_with_timestamp)·{

3859

············struct·timeval·_now;

3859

············struct·timeval·_now;

3860

············gettimeofday(&_now,·NULL);

3860

············gettimeofday(&_now,·NULL);

3862

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zasl·"·"len·%zu"·"\n",

3862

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zasl·"·"len·%zu"·"\n",

3863

·····················qemu_get_thread_id(),

3863

·····················qemu_get_thread_id(),

3864

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3864

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3865

·····················,·len);

3865

·····················,·len);

3866

#line·3868·"trace/trace-hw_nvme.h"

3866

#line·3868·"trace/trace-hw_nvme.h"

3867

········}·else·{

3867

········}·else·{

3869

············qemu_log("pci_nvme_err_zasl·"·"len·%zu"·"\n",·len);

3869

············qemu_log("pci_nvme_err_zasl·"·"len·%zu"·"\n",·len);

3870

#line·3872·"trace/trace-hw_nvme.h"

3870

#line·3872·"trace/trace-hw_nvme.h"

3871

········}

3871

········}

3872

····}

3872

····}

3873

}

3873

}

3874

static·inline·void·trace_pci_nvme_err_zasl(size_t·len)

3874

static·inline·void·trace_pci_nvme_err_zasl(size_t·len)

3886

static·inline·void·_nocheck__trace_pci_nvme_err_req_status(uint16_t·cid,·uint32_t·nsid,·uint16_t·status,·uint8_t·opc)

3886

static·inline·void·_nocheck__trace_pci_nvme_err_req_status(uint16_t·cid,·uint32_t·nsid,·uint16_t·status,·uint8_t·opc)

3887

{

3887

{

3888

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_REQ_STATUS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3888

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_REQ_STATUS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3889

········if·(message_with_timestamp)·{

3889

········if·(message_with_timestamp)·{

3890

············struct·timeval·_now;

3890

············struct·timeval·_now;

3891

············gettimeofday(&_now,·NULL);

3891

············gettimeofday(&_now,·NULL);

3893

············qemu_log("%d@%zu.%06zu:pci_nvme_err_req_status·"·"cid·%"PRIu16"·nsid·%"PRIu32"·status·0x%"PRIx16"·opc·0x%"PRIx8""·"\n",

3893

············qemu_log("%d@%zu.%06zu:pci_nvme_err_req_status·"·"cid·%"PRIu16"·nsid·%"PRIu32"·status·0x%"PRIx16"·opc·0x%"PRIx8""·"\n",

3894

·····················qemu_get_thread_id(),

3894

·····················qemu_get_thread_id(),

3895

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3895

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3896

·····················,·cid,·nsid,·status,·opc);

3896

·····················,·cid,·nsid,·status,·opc);

3897

#line·3899·"trace/trace-hw_nvme.h"

3897

#line·3899·"trace/trace-hw_nvme.h"

3898

········}·else·{

3898

········}·else·{

3900

············qemu_log("pci_nvme_err_req_status·"·"cid·%"PRIu16"·nsid·%"PRIu32"·status·0x%"PRIx16"·opc·0x%"PRIx8""·"\n",·cid,·nsid,·status,·opc);

3900

············qemu_log("pci_nvme_err_req_status·"·"cid·%"PRIu16"·nsid·%"PRIu32"·status·0x%"PRIx16"·opc·0x%"PRIx8""·"\n",·cid,·nsid,·status,·opc);

3901

#line·3903·"trace/trace-hw_nvme.h"

3901

#line·3903·"trace/trace-hw_nvme.h"

3902

········}

3902

········}

3903

····}

3903

····}

3904

}

3904

}

3905

static·inline·void·trace_pci_nvme_err_req_status(uint16_t·cid,·uint32_t·nsid,·uint16_t·status,·uint8_t·opc)

3905

static·inline·void·trace_pci_nvme_err_req_status(uint16_t·cid,·uint32_t·nsid,·uint16_t·status,·uint8_t·opc)

3917

static·inline·void·_nocheck__trace_pci_nvme_err_addr_read(uint64_t·addr)

3917

static·inline·void·_nocheck__trace_pci_nvme_err_addr_read(uint64_t·addr)

3918

{

3918

{

3919

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ADDR_READ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3919

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ADDR_READ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3920

········if·(message_with_timestamp)·{

3920

········if·(message_with_timestamp)·{

3921

············struct·timeval·_now;

3921

············struct·timeval·_now;

3922

············gettimeofday(&_now,·NULL);

3922

············gettimeofday(&_now,·NULL);

3924

············qemu_log("%d@%zu.%06zu:pci_nvme_err_addr_read·"·"addr·0x%"PRIx64""·"\n",

3924

············qemu_log("%d@%zu.%06zu:pci_nvme_err_addr_read·"·"addr·0x%"PRIx64""·"\n",

3925

·····················qemu_get_thread_id(),

3925

·····················qemu_get_thread_id(),

3926

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3926

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3927

·····················,·addr);

3927

·····················,·addr);

3928

#line·3930·"trace/trace-hw_nvme.h"

3928

#line·3930·"trace/trace-hw_nvme.h"

3929

········}·else·{

3929

········}·else·{

3931

············qemu_log("pci_nvme_err_addr_read·"·"addr·0x%"PRIx64""·"\n",·addr);

3931

············qemu_log("pci_nvme_err_addr_read·"·"addr·0x%"PRIx64""·"\n",·addr);

3932

#line·3934·"trace/trace-hw_nvme.h"

3932

#line·3934·"trace/trace-hw_nvme.h"

3933

········}

3933

········}

3934

····}

3934

····}

3935

}

3935

}

3936

static·inline·void·trace_pci_nvme_err_addr_read(uint64_t·addr)

3936

static·inline·void·trace_pci_nvme_err_addr_read(uint64_t·addr)

3948

static·inline·void·_nocheck__trace_pci_nvme_err_addr_write(uint64_t·addr)

3948

static·inline·void·_nocheck__trace_pci_nvme_err_addr_write(uint64_t·addr)

3949

{

3949

{

3950

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ADDR_WRITE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3950

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ADDR_WRITE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3951

········if·(message_with_timestamp)·{

3951

········if·(message_with_timestamp)·{

3952

············struct·timeval·_now;

3952

············struct·timeval·_now;

3953

············gettimeofday(&_now,·NULL);

3953

············gettimeofday(&_now,·NULL);

3955

············qemu_log("%d@%zu.%06zu:pci_nvme_err_addr_write·"·"addr·0x%"PRIx64""·"\n",

3955

············qemu_log("%d@%zu.%06zu:pci_nvme_err_addr_write·"·"addr·0x%"PRIx64""·"\n",

3956

·····················qemu_get_thread_id(),

3956

·····················qemu_get_thread_id(),

3957

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3957

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3958

·····················,·addr);

3958

·····················,·addr);

3959

#line·3961·"trace/trace-hw_nvme.h"

3959

#line·3961·"trace/trace-hw_nvme.h"

3960

········}·else·{

3960

········}·else·{

3962

············qemu_log("pci_nvme_err_addr_write·"·"addr·0x%"PRIx64""·"\n",·addr);

3962

············qemu_log("pci_nvme_err_addr_write·"·"addr·0x%"PRIx64""·"\n",·addr);

3963

#line·3965·"trace/trace-hw_nvme.h"

3963

#line·3965·"trace/trace-hw_nvme.h"

3964

········}

3964

········}

3965

····}

3965

····}

3966

}

3966

}

3967

static·inline·void·trace_pci_nvme_err_addr_write(uint64_t·addr)

3967

static·inline·void·trace_pci_nvme_err_addr_write(uint64_t·addr)

3979

static·inline·void·_nocheck__trace_pci_nvme_err_cfs(void)

3979

static·inline·void·_nocheck__trace_pci_nvme_err_cfs(void)

3980

{

3980

{

3981

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_CFS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3981

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_CFS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

3982

········if·(message_with_timestamp)·{

3982

········if·(message_with_timestamp)·{

3983

············struct·timeval·_now;

3983

············struct·timeval·_now;

3984

············gettimeofday(&_now,·NULL);

3984

············gettimeofday(&_now,·NULL);

3986

············qemu_log("%d@%zu.%06zu:pci_nvme_err_cfs·"·"controller·fatal·status"·"\n",

3986

············qemu_log("%d@%zu.%06zu:pci_nvme_err_cfs·"·"controller·fatal·status"·"\n",

3987

·····················qemu_get_thread_id(),

3987

·····················qemu_get_thread_id(),

3988

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3988

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

3989

·····················);

3989

·····················);

3990

#line·3992·"trace/trace-hw_nvme.h"

3990

#line·3992·"trace/trace-hw_nvme.h"

3991

········}·else·{

3991

········}·else·{

3993

············qemu_log("pci_nvme_err_cfs·"·"controller·fatal·status"·"\n");

3993

············qemu_log("pci_nvme_err_cfs·"·"controller·fatal·status"·"\n");

3994

#line·3996·"trace/trace-hw_nvme.h"

3994

#line·3996·"trace/trace-hw_nvme.h"

3995

········}

3995

········}

3996

····}

3996

····}

3997

}

3997

}

3998

static·inline·void·trace_pci_nvme_err_cfs(void)

3998

static·inline·void·trace_pci_nvme_err_cfs(void)

4010

static·inline·void·_nocheck__trace_pci_nvme_err_aio(uint16_t·cid,·const·char·*·errname,·uint16_t·status)

4010

static·inline·void·_nocheck__trace_pci_nvme_err_aio(uint16_t·cid,·const·char·*·errname,·uint16_t·status)

4011

{

4011

{

4012

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_AIO)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4012

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_AIO)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4013

········if·(message_with_timestamp)·{

4013

········if·(message_with_timestamp)·{

4014

············struct·timeval·_now;

4014

············struct·timeval·_now;

4015

············gettimeofday(&_now,·NULL);

4015

············gettimeofday(&_now,·NULL);

4017

············qemu_log("%d@%zu.%06zu:pci_nvme_err_aio·"·"cid·%"PRIu16"·err·'%s'·status·0x%"PRIx16""·"\n",

4017

············qemu_log("%d@%zu.%06zu:pci_nvme_err_aio·"·"cid·%"PRIu16"·err·'%s'·status·0x%"PRIx16""·"\n",

4018

·····················qemu_get_thread_id(),

4018

·····················qemu_get_thread_id(),

4019

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4019

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4020

·····················,·cid,·errname,·status);

4020

·····················,·cid,·errname,·status);

4021

#line·4023·"trace/trace-hw_nvme.h"

4021

#line·4023·"trace/trace-hw_nvme.h"

4022

········}·else·{

4022

········}·else·{

4024

············qemu_log("pci_nvme_err_aio·"·"cid·%"PRIu16"·err·'%s'·status·0x%"PRIx16""·"\n",·cid,·errname,·status);

4024

············qemu_log("pci_nvme_err_aio·"·"cid·%"PRIu16"·err·'%s'·status·0x%"PRIx16""·"\n",·cid,·errname,·status);

4025

#line·4027·"trace/trace-hw_nvme.h"

4025

#line·4027·"trace/trace-hw_nvme.h"

4026

········}

4026

········}

4027

····}

4027

····}

4028

}

4028

}

4029

static·inline·void·trace_pci_nvme_err_aio(uint16_t·cid,·const·char·*·errname,·uint16_t·status)

4029

static·inline·void·trace_pci_nvme_err_aio(uint16_t·cid,·const·char·*·errname,·uint16_t·status)

4041

static·inline·void·_nocheck__trace_pci_nvme_err_copy_invalid_format(uint8_t·format)

4041

static·inline·void·_nocheck__trace_pci_nvme_err_copy_invalid_format(uint8_t·format)

4042

{

4042

{

4043

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_COPY_INVALID_FORMAT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4043

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_COPY_INVALID_FORMAT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4044

········if·(message_with_timestamp)·{

4044

········if·(message_with_timestamp)·{

4045

············struct·timeval·_now;

4045

············struct·timeval·_now;

4046

············gettimeofday(&_now,·NULL);

4046

············gettimeofday(&_now,·NULL);

4048

············qemu_log("%d@%zu.%06zu:pci_nvme_err_copy_invalid_format·"·"format·0x%"PRIx8""·"\n",

4048

············qemu_log("%d@%zu.%06zu:pci_nvme_err_copy_invalid_format·"·"format·0x%"PRIx8""·"\n",

4049

·····················qemu_get_thread_id(),

4049

·····················qemu_get_thread_id(),

4050

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4050

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4051

·····················,·format);

4051

·····················,·format);

4052

#line·4054·"trace/trace-hw_nvme.h"

4052

#line·4054·"trace/trace-hw_nvme.h"

4053

········}·else·{

4053

········}·else·{

4055

············qemu_log("pci_nvme_err_copy_invalid_format·"·"format·0x%"PRIx8""·"\n",·format);

4055

············qemu_log("pci_nvme_err_copy_invalid_format·"·"format·0x%"PRIx8""·"\n",·format);

4056

#line·4058·"trace/trace-hw_nvme.h"

4056

#line·4058·"trace/trace-hw_nvme.h"

4057

········}

4057

········}

4058

····}

4058

····}

4059

}

4059

}

4060

static·inline·void·trace_pci_nvme_err_copy_invalid_format(uint8_t·format)

4060

static·inline·void·trace_pci_nvme_err_copy_invalid_format(uint8_t·format)

4072

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_sgld(uint16_t·cid,·uint8_t·typ)

4072

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_sgld(uint16_t·cid,·uint8_t·typ)

4073

{

4073

{

4074

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_SGLD)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4074

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_SGLD)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4075

········if·(message_with_timestamp)·{

4075

········if·(message_with_timestamp)·{

4076

············struct·timeval·_now;

4076

············struct·timeval·_now;

4077

············gettimeofday(&_now,·NULL);

4077

············gettimeofday(&_now,·NULL);

4079

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_sgld·"·"cid·%"PRIu16"·type·0x%"PRIx8""·"\n",

4079

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_sgld·"·"cid·%"PRIu16"·type·0x%"PRIx8""·"\n",

4080

·····················qemu_get_thread_id(),

4080

·····················qemu_get_thread_id(),

4081

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4081

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4082

·····················,·cid,·typ);

4082

·····················,·cid,·typ);

4083

#line·4085·"trace/trace-hw_nvme.h"

4083

#line·4085·"trace/trace-hw_nvme.h"

4084

········}·else·{

4084

········}·else·{

4086

············qemu_log("pci_nvme_err_invalid_sgld·"·"cid·%"PRIu16"·type·0x%"PRIx8""·"\n",·cid,·typ);

4086

············qemu_log("pci_nvme_err_invalid_sgld·"·"cid·%"PRIu16"·type·0x%"PRIx8""·"\n",·cid,·typ);

4087

#line·4089·"trace/trace-hw_nvme.h"

4087

#line·4089·"trace/trace-hw_nvme.h"

4088

········}

4088

········}

4089

····}

4089

····}

4090

}

4090

}

4091

static·inline·void·trace_pci_nvme_err_invalid_sgld(uint16_t·cid,·uint8_t·typ)

4091

static·inline·void·trace_pci_nvme_err_invalid_sgld(uint16_t·cid,·uint8_t·typ)

4103

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_num_sgld(uint16_t·cid,·uint8_t·typ)

4103

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_num_sgld(uint16_t·cid,·uint8_t·typ)

4104

{

4104

{

4105

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_NUM_SGLD)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4105

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_NUM_SGLD)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4106

········if·(message_with_timestamp)·{

4106

········if·(message_with_timestamp)·{

4107

············struct·timeval·_now;

4107

············struct·timeval·_now;

4108

············gettimeofday(&_now,·NULL);

4108

············gettimeofday(&_now,·NULL);

4110

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_num_sgld·"·"cid·%"PRIu16"·type·0x%"PRIx8""·"\n",

4110

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_num_sgld·"·"cid·%"PRIu16"·type·0x%"PRIx8""·"\n",

4111

·····················qemu_get_thread_id(),

4111

·····················qemu_get_thread_id(),

4112

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4112

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4113

·····················,·cid,·typ);

4113

·····················,·cid,·typ);

4114

#line·4116·"trace/trace-hw_nvme.h"

4114

#line·4116·"trace/trace-hw_nvme.h"

4115

········}·else·{

4115

········}·else·{

4117

············qemu_log("pci_nvme_err_invalid_num_sgld·"·"cid·%"PRIu16"·type·0x%"PRIx8""·"\n",·cid,·typ);

4117

············qemu_log("pci_nvme_err_invalid_num_sgld·"·"cid·%"PRIu16"·type·0x%"PRIx8""·"\n",·cid,·typ);

4118

#line·4120·"trace/trace-hw_nvme.h"

4118

#line·4120·"trace/trace-hw_nvme.h"

4119

········}

4119

········}

4120

····}

4120

····}

4121

}

4121

}

4122

static·inline·void·trace_pci_nvme_err_invalid_num_sgld(uint16_t·cid,·uint8_t·typ)

4122

static·inline·void·trace_pci_nvme_err_invalid_num_sgld(uint16_t·cid,·uint8_t·typ)

4134

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_sgl_excess_length(uint32_t·residual)

4134

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_sgl_excess_length(uint32_t·residual)

4135

{

4135

{

4136

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_SGL_EXCESS_LENGTH)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4136

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_SGL_EXCESS_LENGTH)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4137

········if·(message_with_timestamp)·{

4137

········if·(message_with_timestamp)·{

4138

············struct·timeval·_now;

4138

············struct·timeval·_now;

4139

············gettimeofday(&_now,·NULL);

4139

············gettimeofday(&_now,·NULL);

4141

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_sgl_excess_length·"·"residual·%"PRIu32""·"\n",

4141

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_sgl_excess_length·"·"residual·%"PRIu32""·"\n",

4142

·····················qemu_get_thread_id(),

4142

·····················qemu_get_thread_id(),

4143

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4143

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4144

·····················,·residual);

4144

·····················,·residual);

4145

#line·4147·"trace/trace-hw_nvme.h"

4145

#line·4147·"trace/trace-hw_nvme.h"

4146

········}·else·{

4146

········}·else·{

4148

············qemu_log("pci_nvme_err_invalid_sgl_excess_length·"·"residual·%"PRIu32""·"\n",·residual);

4148

············qemu_log("pci_nvme_err_invalid_sgl_excess_length·"·"residual·%"PRIu32""·"\n",·residual);

4149

#line·4151·"trace/trace-hw_nvme.h"

4149

#line·4151·"trace/trace-hw_nvme.h"

4150

········}

4150

········}

4151

····}

4151

····}

4152

}

4152

}

4153

static·inline·void·trace_pci_nvme_err_invalid_sgl_excess_length(uint32_t·residual)

4153

static·inline·void·trace_pci_nvme_err_invalid_sgl_excess_length(uint32_t·residual)

4165

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_dma(void)

4165

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_dma(void)

4166

{

4166

{

4167

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_DMA)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4167

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_DMA)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4168

········if·(message_with_timestamp)·{

4168

········if·(message_with_timestamp)·{

4169

············struct·timeval·_now;

4169

············struct·timeval·_now;

4170

············gettimeofday(&_now,·NULL);

4170

············gettimeofday(&_now,·NULL);

4172

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_dma·"·"PRP/SGL·is·too·small·for·transfer·size"·"\n",

4172

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_dma·"·"PRP/SGL·is·too·small·for·transfer·size"·"\n",

4173

·····················qemu_get_thread_id(),

4173

·····················qemu_get_thread_id(),

4174

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4174

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4175

·····················);

4175

·····················);

4176

#line·4178·"trace/trace-hw_nvme.h"

4176

#line·4178·"trace/trace-hw_nvme.h"

4177

········}·else·{

4177

········}·else·{

4179

············qemu_log("pci_nvme_err_invalid_dma·"·"PRP/SGL·is·too·small·for·transfer·size"·"\n");

4179

············qemu_log("pci_nvme_err_invalid_dma·"·"PRP/SGL·is·too·small·for·transfer·size"·"\n");

4180

#line·4182·"trace/trace-hw_nvme.h"

4180

#line·4182·"trace/trace-hw_nvme.h"

4181

········}

4181

········}

4182

····}

4182

····}

4183

}

4183

}

4184

static·inline·void·trace_pci_nvme_err_invalid_dma(void)

4184

static·inline·void·trace_pci_nvme_err_invalid_dma(void)

4196

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_prplist_ent(uint64_t·prplist)

4196

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_prplist_ent(uint64_t·prplist)

4197

{

4197

{

4198

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_PRPLIST_ENT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4198

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_PRPLIST_ENT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4199

········if·(message_with_timestamp)·{

4199

········if·(message_with_timestamp)·{

4200

············struct·timeval·_now;

4200

············struct·timeval·_now;

4201

············gettimeofday(&_now,·NULL);

4201

············gettimeofday(&_now,·NULL);

4203

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_prplist_ent·"·"PRP·list·entry·is·not·page·aligned:·0x%"PRIx64""·"\n",

4203

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_prplist_ent·"·"PRP·list·entry·is·not·page·aligned:·0x%"PRIx64""·"\n",

4204

·····················qemu_get_thread_id(),

4204

·····················qemu_get_thread_id(),

4205

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4205

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4206

·····················,·prplist);

4206

·····················,·prplist);

4207

#line·4209·"trace/trace-hw_nvme.h"

4207

#line·4209·"trace/trace-hw_nvme.h"

4208

········}·else·{

4208

········}·else·{

4210

············qemu_log("pci_nvme_err_invalid_prplist_ent·"·"PRP·list·entry·is·not·page·aligned:·0x%"PRIx64""·"\n",·prplist);

4210

············qemu_log("pci_nvme_err_invalid_prplist_ent·"·"PRP·list·entry·is·not·page·aligned:·0x%"PRIx64""·"\n",·prplist);

4211

#line·4213·"trace/trace-hw_nvme.h"

4211

#line·4213·"trace/trace-hw_nvme.h"

4212

········}

4212

········}

4213

····}

4213

····}

4214

}

4214

}

4215

static·inline·void·trace_pci_nvme_err_invalid_prplist_ent(uint64_t·prplist)

4215

static·inline·void·trace_pci_nvme_err_invalid_prplist_ent(uint64_t·prplist)

4227

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_prp2_align(uint64_t·prp2)

4227

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_prp2_align(uint64_t·prp2)

4228

{

4228

{

4229

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_PRP2_ALIGN)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4229

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_PRP2_ALIGN)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4230

········if·(message_with_timestamp)·{

4230

········if·(message_with_timestamp)·{

4231

············struct·timeval·_now;

4231

············struct·timeval·_now;

4232

············gettimeofday(&_now,·NULL);

4232

············gettimeofday(&_now,·NULL);

4234

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_prp2_align·"·"PRP2·is·not·page·aligned:·0x%"PRIx64""·"\n",

4234

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_prp2_align·"·"PRP2·is·not·page·aligned:·0x%"PRIx64""·"\n",

4235

·····················qemu_get_thread_id(),

4235

·····················qemu_get_thread_id(),

4236

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4236

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4237

·····················,·prp2);

4237

·····················,·prp2);

4238

#line·4240·"trace/trace-hw_nvme.h"

4238

#line·4240·"trace/trace-hw_nvme.h"

4239

········}·else·{

4239

········}·else·{

4241

············qemu_log("pci_nvme_err_invalid_prp2_align·"·"PRP2·is·not·page·aligned:·0x%"PRIx64""·"\n",·prp2);

4241

············qemu_log("pci_nvme_err_invalid_prp2_align·"·"PRP2·is·not·page·aligned:·0x%"PRIx64""·"\n",·prp2);

4242

#line·4244·"trace/trace-hw_nvme.h"

4242

#line·4244·"trace/trace-hw_nvme.h"

4243

········}

4243

········}

4244

····}

4244

····}

4245

}

4245

}

4246

static·inline·void·trace_pci_nvme_err_invalid_prp2_align(uint64_t·prp2)

4246

static·inline·void·trace_pci_nvme_err_invalid_prp2_align(uint64_t·prp2)

4258

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_opc(uint8_t·opc)

4258

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_opc(uint8_t·opc)

4259

{

4259

{

4260

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_OPC)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4260

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_OPC)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4261

········if·(message_with_timestamp)·{

4261

········if·(message_with_timestamp)·{

4262

············struct·timeval·_now;

4262

············struct·timeval·_now;

4263

············gettimeofday(&_now,·NULL);

4263

············gettimeofday(&_now,·NULL);

4265

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_opc·"·"invalid·opcode·0x%"PRIx8""·"\n",

4265

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_opc·"·"invalid·opcode·0x%"PRIx8""·"\n",

4266

·····················qemu_get_thread_id(),

4266

·····················qemu_get_thread_id(),

4267

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4267

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4268

·····················,·opc);

4268

·····················,·opc);

4269

#line·4271·"trace/trace-hw_nvme.h"

4269

#line·4271·"trace/trace-hw_nvme.h"

4270

········}·else·{

4270

········}·else·{

4272

············qemu_log("pci_nvme_err_invalid_opc·"·"invalid·opcode·0x%"PRIx8""·"\n",·opc);

4272

············qemu_log("pci_nvme_err_invalid_opc·"·"invalid·opcode·0x%"PRIx8""·"\n",·opc);

4273

#line·4275·"trace/trace-hw_nvme.h"

4273

#line·4275·"trace/trace-hw_nvme.h"

4274

········}

4274

········}

4275

····}

4275

····}

4276

}

4276

}

4277

static·inline·void·trace_pci_nvme_err_invalid_opc(uint8_t·opc)

4277

static·inline·void·trace_pci_nvme_err_invalid_opc(uint8_t·opc)

4289

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_admin_opc(uint8_t·opc)

4289

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_admin_opc(uint8_t·opc)

4290

{

4290

{

4291

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_ADMIN_OPC)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4291

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_ADMIN_OPC)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4292

········if·(message_with_timestamp)·{

4292

········if·(message_with_timestamp)·{

4293

············struct·timeval·_now;

4293

············struct·timeval·_now;

4294

············gettimeofday(&_now,·NULL);

4294

············gettimeofday(&_now,·NULL);

4296

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_admin_opc·"·"invalid·admin·opcode·0x%"PRIx8""·"\n",

4296

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_admin_opc·"·"invalid·admin·opcode·0x%"PRIx8""·"\n",

4297

·····················qemu_get_thread_id(),

4297

·····················qemu_get_thread_id(),

4298

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4298

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4299

·····················,·opc);

4299

·····················,·opc);

4300

#line·4302·"trace/trace-hw_nvme.h"

4300

#line·4302·"trace/trace-hw_nvme.h"

4301

········}·else·{

4301

········}·else·{

4303

············qemu_log("pci_nvme_err_invalid_admin_opc·"·"invalid·admin·opcode·0x%"PRIx8""·"\n",·opc);

4303

············qemu_log("pci_nvme_err_invalid_admin_opc·"·"invalid·admin·opcode·0x%"PRIx8""·"\n",·opc);

4304

#line·4306·"trace/trace-hw_nvme.h"

4304

#line·4306·"trace/trace-hw_nvme.h"

4305

········}

4305

········}

4306

····}

4306

····}

4307

}

4307

}

4308

static·inline·void·trace_pci_nvme_err_invalid_admin_opc(uint8_t·opc)

4308

static·inline·void·trace_pci_nvme_err_invalid_admin_opc(uint8_t·opc)

4320

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_lba_range(uint64_t·start,·uint64_t·len,·uint64_t·limit)

4320

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_lba_range(uint64_t·start,·uint64_t·len,·uint64_t·limit)

4321

{

4321

{

4322

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_LBA_RANGE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4322

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_LBA_RANGE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4323

········if·(message_with_timestamp)·{

4323

········if·(message_with_timestamp)·{

4324

············struct·timeval·_now;

4324

············struct·timeval·_now;

4325

············gettimeofday(&_now,·NULL);

4325

············gettimeofday(&_now,·NULL);

4327

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_lba_range·"·"Invalid·LBA·start=%"PRIu64"·len=%"PRIu64"·limit=%"PRIu64""·"\n",

4327

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_lba_range·"·"Invalid·LBA·start=%"PRIu64"·len=%"PRIu64"·limit=%"PRIu64""·"\n",

4328

·····················qemu_get_thread_id(),

4328

·····················qemu_get_thread_id(),

4329

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4329

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4330

·····················,·start,·len,·limit);

4330

·····················,·start,·len,·limit);

4331

#line·4333·"trace/trace-hw_nvme.h"

4331

#line·4333·"trace/trace-hw_nvme.h"

4332

········}·else·{

4332

········}·else·{

4334

············qemu_log("pci_nvme_err_invalid_lba_range·"·"Invalid·LBA·start=%"PRIu64"·len=%"PRIu64"·limit=%"PRIu64""·"\n",·start,·len,·limit);

4334

············qemu_log("pci_nvme_err_invalid_lba_range·"·"Invalid·LBA·start=%"PRIu64"·len=%"PRIu64"·limit=%"PRIu64""·"\n",·start,·len,·limit);

4335

#line·4337·"trace/trace-hw_nvme.h"

4335

#line·4337·"trace/trace-hw_nvme.h"

4336

········}

4336

········}

4337

····}

4337

····}

4338

}

4338

}

4339

static·inline·void·trace_pci_nvme_err_invalid_lba_range(uint64_t·start,·uint64_t·len,·uint64_t·limit)

4339

static·inline·void·trace_pci_nvme_err_invalid_lba_range(uint64_t·start,·uint64_t·len,·uint64_t·limit)

4351

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_log_page_offset(uint64_t·ofs,·uint64_t·size)

4351

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_log_page_offset(uint64_t·ofs,·uint64_t·size)

4352

{

4352

{

4353

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_LOG_PAGE_OFFSET)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4353

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_LOG_PAGE_OFFSET)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4354

········if·(message_with_timestamp)·{

4354

········if·(message_with_timestamp)·{

4355

············struct·timeval·_now;

4355

············struct·timeval·_now;

4356

············gettimeofday(&_now,·NULL);

4356

············gettimeofday(&_now,·NULL);

4358

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_log_page_offset·"·"must·be·<=·%"PRIu64",·got·%"PRIu64""·"\n",

4358

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_log_page_offset·"·"must·be·<=·%"PRIu64",·got·%"PRIu64""·"\n",

4359

·····················qemu_get_thread_id(),

4359

·····················qemu_get_thread_id(),

4360

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4360

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4361

·····················,·ofs,·size);

4361

·····················,·ofs,·size);

4362

#line·4364·"trace/trace-hw_nvme.h"

4362

#line·4364·"trace/trace-hw_nvme.h"

4363

········}·else·{

4363

········}·else·{

4365

············qemu_log("pci_nvme_err_invalid_log_page_offset·"·"must·be·<=·%"PRIu64",·got·%"PRIu64""·"\n",·ofs,·size);

4365

············qemu_log("pci_nvme_err_invalid_log_page_offset·"·"must·be·<=·%"PRIu64",·got·%"PRIu64""·"\n",·ofs,·size);

4366

#line·4368·"trace/trace-hw_nvme.h"

4366

#line·4368·"trace/trace-hw_nvme.h"

4367

········}

4367

········}

4368

····}

4368

····}

4369

}

4369

}

4370

static·inline·void·trace_pci_nvme_err_invalid_log_page_offset(uint64_t·ofs,·uint64_t·size)

4370

static·inline·void·trace_pci_nvme_err_invalid_log_page_offset(uint64_t·ofs,·uint64_t·size)

4382

static·inline·void·_nocheck__trace_pci_nvme_err_cmb_invalid_cba(uint64_t·cmbmsc)

4382

static·inline·void·_nocheck__trace_pci_nvme_err_cmb_invalid_cba(uint64_t·cmbmsc)

4383

{

4383

{

4384

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_CMB_INVALID_CBA)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4384

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_CMB_INVALID_CBA)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4385

········if·(message_with_timestamp)·{

4385

········if·(message_with_timestamp)·{

4386

············struct·timeval·_now;

4386

············struct·timeval·_now;

4387

············gettimeofday(&_now,·NULL);

4387

············gettimeofday(&_now,·NULL);

4389

············qemu_log("%d@%zu.%06zu:pci_nvme_err_cmb_invalid_cba·"·"cmbmsc·0x%"PRIx64""·"\n",

4389

············qemu_log("%d@%zu.%06zu:pci_nvme_err_cmb_invalid_cba·"·"cmbmsc·0x%"PRIx64""·"\n",

4390

·····················qemu_get_thread_id(),

4390

·····················qemu_get_thread_id(),

4391

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4391

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4392

·····················,·cmbmsc);

4392

·····················,·cmbmsc);

4393

#line·4395·"trace/trace-hw_nvme.h"

4393

#line·4395·"trace/trace-hw_nvme.h"

4394

········}·else·{

4394

········}·else·{

4396

············qemu_log("pci_nvme_err_cmb_invalid_cba·"·"cmbmsc·0x%"PRIx64""·"\n",·cmbmsc);

4396

············qemu_log("pci_nvme_err_cmb_invalid_cba·"·"cmbmsc·0x%"PRIx64""·"\n",·cmbmsc);

4397

#line·4399·"trace/trace-hw_nvme.h"

4397

#line·4399·"trace/trace-hw_nvme.h"

4398

········}

4398

········}

4399

····}

4399

····}

4400

}

4400

}

4401

static·inline·void·trace_pci_nvme_err_cmb_invalid_cba(uint64_t·cmbmsc)

4401

static·inline·void·trace_pci_nvme_err_cmb_invalid_cba(uint64_t·cmbmsc)

4413

static·inline·void·_nocheck__trace_pci_nvme_err_cmb_not_enabled(uint64_t·cmbmsc)

4413

static·inline·void·_nocheck__trace_pci_nvme_err_cmb_not_enabled(uint64_t·cmbmsc)

4414

{

4414

{

4415

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_CMB_NOT_ENABLED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4415

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_CMB_NOT_ENABLED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4416

········if·(message_with_timestamp)·{

4416

········if·(message_with_timestamp)·{

4417

············struct·timeval·_now;

4417

············struct·timeval·_now;

4418

············gettimeofday(&_now,·NULL);

4418

············gettimeofday(&_now,·NULL);

4420

············qemu_log("%d@%zu.%06zu:pci_nvme_err_cmb_not_enabled·"·"cmbmsc·0x%"PRIx64""·"\n",

4420

············qemu_log("%d@%zu.%06zu:pci_nvme_err_cmb_not_enabled·"·"cmbmsc·0x%"PRIx64""·"\n",

4421

·····················qemu_get_thread_id(),

4421

·····················qemu_get_thread_id(),

4422

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4422

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4423

·····················,·cmbmsc);

4423

·····················,·cmbmsc);

4424

#line·4426·"trace/trace-hw_nvme.h"

4424

#line·4426·"trace/trace-hw_nvme.h"

4425

········}·else·{

4425

········}·else·{

4427

············qemu_log("pci_nvme_err_cmb_not_enabled·"·"cmbmsc·0x%"PRIx64""·"\n",·cmbmsc);

4427

············qemu_log("pci_nvme_err_cmb_not_enabled·"·"cmbmsc·0x%"PRIx64""·"\n",·cmbmsc);

4428

#line·4430·"trace/trace-hw_nvme.h"

4428

#line·4430·"trace/trace-hw_nvme.h"

4429

········}

4429

········}

4430

····}

4430

····}

4431

}

4431

}

4432

static·inline·void·trace_pci_nvme_err_cmb_not_enabled(uint64_t·cmbmsc)

4432

static·inline·void·trace_pci_nvme_err_cmb_not_enabled(uint64_t·cmbmsc)

4444

static·inline·void·_nocheck__trace_pci_nvme_err_unaligned_zone_cmd(uint8_t·action,·uint64_t·slba,·uint64_t·zslba)

4444

static·inline·void·_nocheck__trace_pci_nvme_err_unaligned_zone_cmd(uint8_t·action,·uint64_t·slba,·uint64_t·zslba)

4445

{

4445

{

4446

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_UNALIGNED_ZONE_CMD)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4446

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_UNALIGNED_ZONE_CMD)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4447

········if·(message_with_timestamp)·{

4447

········if·(message_with_timestamp)·{

4448

············struct·timeval·_now;

4448

············struct·timeval·_now;

4449

············gettimeofday(&_now,·NULL);

4449

············gettimeofday(&_now,·NULL);

4451

············qemu_log("%d@%zu.%06zu:pci_nvme_err_unaligned_zone_cmd·"·"unaligned·zone·op·0x%"PRIx32",·got·slba=%"PRIu64",·zslba=%"PRIu64""·"\n",

4451

············qemu_log("%d@%zu.%06zu:pci_nvme_err_unaligned_zone_cmd·"·"unaligned·zone·op·0x%"PRIx32",·got·slba=%"PRIu64",·zslba=%"PRIu64""·"\n",

4452

·····················qemu_get_thread_id(),

4452

·····················qemu_get_thread_id(),

4453

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4453

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4454

·····················,·action,·slba,·zslba);

4454

·····················,·action,·slba,·zslba);

4455

#line·4457·"trace/trace-hw_nvme.h"

4455

#line·4457·"trace/trace-hw_nvme.h"

4456

········}·else·{

4456

········}·else·{

4458

············qemu_log("pci_nvme_err_unaligned_zone_cmd·"·"unaligned·zone·op·0x%"PRIx32",·got·slba=%"PRIu64",·zslba=%"PRIu64""·"\n",·action,·slba,·zslba);

4458

············qemu_log("pci_nvme_err_unaligned_zone_cmd·"·"unaligned·zone·op·0x%"PRIx32",·got·slba=%"PRIu64",·zslba=%"PRIu64""·"\n",·action,·slba,·zslba);

4459

#line·4461·"trace/trace-hw_nvme.h"

4459

#line·4461·"trace/trace-hw_nvme.h"

4460

········}

4460

········}

4461

····}

4461

····}

4462

}

4462

}

4463

static·inline·void·trace_pci_nvme_err_unaligned_zone_cmd(uint8_t·action,·uint64_t·slba,·uint64_t·zslba)

4463

static·inline·void·trace_pci_nvme_err_unaligned_zone_cmd(uint8_t·action,·uint64_t·slba,·uint64_t·zslba)

4475

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_zone_state_transition(uint8_t·action,·uint64_t·slba,·uint8_t·attrs)

4475

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_zone_state_transition(uint8_t·action,·uint64_t·slba,·uint8_t·attrs)

4476

{

4476

{

4477

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_ZONE_STATE_TRANSITION)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4477

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_ZONE_STATE_TRANSITION)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4478

········if·(message_with_timestamp)·{

4478

········if·(message_with_timestamp)·{

4479

············struct·timeval·_now;

4479

············struct·timeval·_now;

4480

············gettimeofday(&_now,·NULL);

4480

············gettimeofday(&_now,·NULL);

4482

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_zone_state_transition·"·"action=0x%"PRIx8",·slba=%"PRIu64",·attrs=0x%"PRIx32""·"\n",

4482

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_zone_state_transition·"·"action=0x%"PRIx8",·slba=%"PRIu64",·attrs=0x%"PRIx32""·"\n",

4483

·····················qemu_get_thread_id(),

4483

·····················qemu_get_thread_id(),

4484

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4484

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4485

·····················,·action,·slba,·attrs);

4485

·····················,·action,·slba,·attrs);

4486

#line·4488·"trace/trace-hw_nvme.h"

4486

#line·4488·"trace/trace-hw_nvme.h"

4487

········}·else·{

4487

········}·else·{

4489

············qemu_log("pci_nvme_err_invalid_zone_state_transition·"·"action=0x%"PRIx8",·slba=%"PRIu64",·attrs=0x%"PRIx32""·"\n",·action,·slba,·attrs);

4489

············qemu_log("pci_nvme_err_invalid_zone_state_transition·"·"action=0x%"PRIx8",·slba=%"PRIu64",·attrs=0x%"PRIx32""·"\n",·action,·slba,·attrs);

4490

#line·4492·"trace/trace-hw_nvme.h"

4490

#line·4492·"trace/trace-hw_nvme.h"

4491

········}

4491

········}

4492

····}

4492

····}

4493

}

4493

}

4494

static·inline·void·trace_pci_nvme_err_invalid_zone_state_transition(uint8_t·action,·uint64_t·slba,·uint8_t·attrs)

4494

static·inline·void·trace_pci_nvme_err_invalid_zone_state_transition(uint8_t·action,·uint64_t·slba,·uint8_t·attrs)

4506

static·inline·void·_nocheck__trace_pci_nvme_err_write_not_at_wp(uint64_t·slba,·uint64_t·zone,·uint64_t·wp)

4506

static·inline·void·_nocheck__trace_pci_nvme_err_write_not_at_wp(uint64_t·slba,·uint64_t·zone,·uint64_t·wp)

4507

{

4507

{

4508

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_WRITE_NOT_AT_WP)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4508

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_WRITE_NOT_AT_WP)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4509

········if·(message_with_timestamp)·{

4509

········if·(message_with_timestamp)·{

4510

············struct·timeval·_now;

4510

············struct·timeval·_now;

4511

············gettimeofday(&_now,·NULL);

4511

············gettimeofday(&_now,·NULL);

4513

············qemu_log("%d@%zu.%06zu:pci_nvme_err_write_not_at_wp·"·"writing·at·slba=%"PRIu64",·zone=%"PRIu64",·but·wp=%"PRIu64""·"\n",

4513

············qemu_log("%d@%zu.%06zu:pci_nvme_err_write_not_at_wp·"·"writing·at·slba=%"PRIu64",·zone=%"PRIu64",·but·wp=%"PRIu64""·"\n",

4514

·····················qemu_get_thread_id(),

4514

·····················qemu_get_thread_id(),

4515

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4515

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4516

·····················,·slba,·zone,·wp);

4516

·····················,·slba,·zone,·wp);

4517

#line·4519·"trace/trace-hw_nvme.h"

4517

#line·4519·"trace/trace-hw_nvme.h"

4518

········}·else·{

4518

········}·else·{

4520

············qemu_log("pci_nvme_err_write_not_at_wp·"·"writing·at·slba=%"PRIu64",·zone=%"PRIu64",·but·wp=%"PRIu64""·"\n",·slba,·zone,·wp);

4520

············qemu_log("pci_nvme_err_write_not_at_wp·"·"writing·at·slba=%"PRIu64",·zone=%"PRIu64",·but·wp=%"PRIu64""·"\n",·slba,·zone,·wp);

4521

#line·4523·"trace/trace-hw_nvme.h"

4521

#line·4523·"trace/trace-hw_nvme.h"

4522

········}

4522

········}

4523

····}

4523

····}

4524

}

4524

}

4525

static·inline·void·trace_pci_nvme_err_write_not_at_wp(uint64_t·slba,·uint64_t·zone,·uint64_t·wp)

4525

static·inline·void·trace_pci_nvme_err_write_not_at_wp(uint64_t·slba,·uint64_t·zone,·uint64_t·wp)

4537

static·inline·void·_nocheck__trace_pci_nvme_err_append_not_at_start(uint64_t·slba,·uint64_t·zone)

4537

static·inline·void·_nocheck__trace_pci_nvme_err_append_not_at_start(uint64_t·slba,·uint64_t·zone)

4538

{

4538

{

4539

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_APPEND_NOT_AT_START)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4539

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_APPEND_NOT_AT_START)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4540

········if·(message_with_timestamp)·{

4540

········if·(message_with_timestamp)·{

4541

············struct·timeval·_now;

4541

············struct·timeval·_now;

4542

············gettimeofday(&_now,·NULL);

4542

············gettimeofday(&_now,·NULL);

4544

············qemu_log("%d@%zu.%06zu:pci_nvme_err_append_not_at_start·"·"appending·at·slba=%"PRIu64",·but·zone=%"PRIu64""·"\n",

4544

············qemu_log("%d@%zu.%06zu:pci_nvme_err_append_not_at_start·"·"appending·at·slba=%"PRIu64",·but·zone=%"PRIu64""·"\n",

4545

·····················qemu_get_thread_id(),

4545

·····················qemu_get_thread_id(),

4546

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4546

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4547

·····················,·slba,·zone);

4547

·····················,·slba,·zone);

4548

#line·4550·"trace/trace-hw_nvme.h"

4548

#line·4550·"trace/trace-hw_nvme.h"

4549

········}·else·{

4549

········}·else·{

4551

············qemu_log("pci_nvme_err_append_not_at_start·"·"appending·at·slba=%"PRIu64",·but·zone=%"PRIu64""·"\n",·slba,·zone);

4551

············qemu_log("pci_nvme_err_append_not_at_start·"·"appending·at·slba=%"PRIu64",·but·zone=%"PRIu64""·"\n",·slba,·zone);

4552

#line·4554·"trace/trace-hw_nvme.h"

4552

#line·4554·"trace/trace-hw_nvme.h"

4553

········}

4553

········}

4554

····}

4554

····}

4555

}

4555

}

4556

static·inline·void·trace_pci_nvme_err_append_not_at_start(uint64_t·slba,·uint64_t·zone)

4556

static·inline·void·trace_pci_nvme_err_append_not_at_start(uint64_t·slba,·uint64_t·zone)

4568

static·inline·void·_nocheck__trace_pci_nvme_err_zone_is_full(uint64_t·zslba)

4568

static·inline·void·_nocheck__trace_pci_nvme_err_zone_is_full(uint64_t·zslba)

4569

{

4569

{

4570

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZONE_IS_FULL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4570

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZONE_IS_FULL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4571

········if·(message_with_timestamp)·{

4571

········if·(message_with_timestamp)·{

4572

············struct·timeval·_now;

4572

············struct·timeval·_now;

4573

············gettimeofday(&_now,·NULL);

4573

············gettimeofday(&_now,·NULL);

4575

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zone_is_full·"·"zslba·0x%"PRIx64""·"\n",

4575

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zone_is_full·"·"zslba·0x%"PRIx64""·"\n",

4576

·····················qemu_get_thread_id(),

4576

·····················qemu_get_thread_id(),

4577

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4577

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4578

·····················,·zslba);

4578

·····················,·zslba);

4579

#line·4581·"trace/trace-hw_nvme.h"

4579

#line·4581·"trace/trace-hw_nvme.h"

4580

········}·else·{

4580

········}·else·{

4582

············qemu_log("pci_nvme_err_zone_is_full·"·"zslba·0x%"PRIx64""·"\n",·zslba);

4582

············qemu_log("pci_nvme_err_zone_is_full·"·"zslba·0x%"PRIx64""·"\n",·zslba);

4583

#line·4585·"trace/trace-hw_nvme.h"

4583

#line·4585·"trace/trace-hw_nvme.h"

4584

········}

4584

········}

4585

····}

4585

····}

4586

}

4586

}

4587

static·inline·void·trace_pci_nvme_err_zone_is_full(uint64_t·zslba)

4587

static·inline·void·trace_pci_nvme_err_zone_is_full(uint64_t·zslba)

4599

static·inline·void·_nocheck__trace_pci_nvme_err_zone_is_read_only(uint64_t·zslba)

4599

static·inline·void·_nocheck__trace_pci_nvme_err_zone_is_read_only(uint64_t·zslba)

4600

{

4600

{

4601

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZONE_IS_READ_ONLY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4601

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZONE_IS_READ_ONLY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4602

········if·(message_with_timestamp)·{

4602

········if·(message_with_timestamp)·{

4603

············struct·timeval·_now;

4603

············struct·timeval·_now;

4604

············gettimeofday(&_now,·NULL);

4604

············gettimeofday(&_now,·NULL);

4606

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zone_is_read_only·"·"zslba·0x%"PRIx64""·"\n",

4606

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zone_is_read_only·"·"zslba·0x%"PRIx64""·"\n",

4607

·····················qemu_get_thread_id(),

4607

·····················qemu_get_thread_id(),

4608

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4608

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4609

·····················,·zslba);

4609

·····················,·zslba);

4610

#line·4612·"trace/trace-hw_nvme.h"

4610

#line·4612·"trace/trace-hw_nvme.h"

4611

········}·else·{

4611

········}·else·{

4613

············qemu_log("pci_nvme_err_zone_is_read_only·"·"zslba·0x%"PRIx64""·"\n",·zslba);

4613

············qemu_log("pci_nvme_err_zone_is_read_only·"·"zslba·0x%"PRIx64""·"\n",·zslba);

4614

#line·4616·"trace/trace-hw_nvme.h"

4614

#line·4616·"trace/trace-hw_nvme.h"

4615

········}

4615

········}

4616

····}

4616

····}

4617

}

4617

}

4618

static·inline·void·trace_pci_nvme_err_zone_is_read_only(uint64_t·zslba)

4618

static·inline·void·trace_pci_nvme_err_zone_is_read_only(uint64_t·zslba)

4630

static·inline·void·_nocheck__trace_pci_nvme_err_zone_is_offline(uint64_t·zslba)

4630

static·inline·void·_nocheck__trace_pci_nvme_err_zone_is_offline(uint64_t·zslba)

4631

{

4631

{

4632

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZONE_IS_OFFLINE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4632

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZONE_IS_OFFLINE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4633

········if·(message_with_timestamp)·{

4633

········if·(message_with_timestamp)·{

4634

············struct·timeval·_now;

4634

············struct·timeval·_now;

4635

············gettimeofday(&_now,·NULL);

4635

············gettimeofday(&_now,·NULL);

4637

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zone_is_offline·"·"zslba·0x%"PRIx64""·"\n",

4637

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zone_is_offline·"·"zslba·0x%"PRIx64""·"\n",

4638

·····················qemu_get_thread_id(),

4638

·····················qemu_get_thread_id(),

4639

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4639

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4640

·····················,·zslba);

4640

·····················,·zslba);

4641

#line·4643·"trace/trace-hw_nvme.h"

4641

#line·4643·"trace/trace-hw_nvme.h"

4642

········}·else·{

4642

········}·else·{

4644

············qemu_log("pci_nvme_err_zone_is_offline·"·"zslba·0x%"PRIx64""·"\n",·zslba);

4644

············qemu_log("pci_nvme_err_zone_is_offline·"·"zslba·0x%"PRIx64""·"\n",·zslba);

4645

#line·4647·"trace/trace-hw_nvme.h"

4645

#line·4647·"trace/trace-hw_nvme.h"

4646

········}

4646

········}

4647

····}

4647

····}

4648

}

4648

}

4649

static·inline·void·trace_pci_nvme_err_zone_is_offline(uint64_t·zslba)

4649

static·inline·void·trace_pci_nvme_err_zone_is_offline(uint64_t·zslba)

4661

static·inline·void·_nocheck__trace_pci_nvme_err_zone_boundary(uint64_t·slba,·uint32_t·nlb,·uint64_t·zcap)

4661

static·inline·void·_nocheck__trace_pci_nvme_err_zone_boundary(uint64_t·slba,·uint32_t·nlb,·uint64_t·zcap)

4662

{

4662

{

4663

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZONE_BOUNDARY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4663

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZONE_BOUNDARY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4664

········if·(message_with_timestamp)·{

4664

········if·(message_with_timestamp)·{

4665

············struct·timeval·_now;

4665

············struct·timeval·_now;

4666

············gettimeofday(&_now,·NULL);

4666

············gettimeofday(&_now,·NULL);

4668

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zone_boundary·"·"lba·0x%"PRIx64"·nlb·%"PRIu32"·zcap·0x%"PRIx64""·"\n",

4668

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zone_boundary·"·"lba·0x%"PRIx64"·nlb·%"PRIu32"·zcap·0x%"PRIx64""·"\n",

4669

·····················qemu_get_thread_id(),

4669

·····················qemu_get_thread_id(),

4670

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4670

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4671

·····················,·slba,·nlb,·zcap);

4671

·····················,·slba,·nlb,·zcap);

4672

#line·4674·"trace/trace-hw_nvme.h"

4672

#line·4674·"trace/trace-hw_nvme.h"

4673

········}·else·{

4673

········}·else·{

4675

············qemu_log("pci_nvme_err_zone_boundary·"·"lba·0x%"PRIx64"·nlb·%"PRIu32"·zcap·0x%"PRIx64""·"\n",·slba,·nlb,·zcap);

4675

············qemu_log("pci_nvme_err_zone_boundary·"·"lba·0x%"PRIx64"·nlb·%"PRIu32"·zcap·0x%"PRIx64""·"\n",·slba,·nlb,·zcap);

4676

#line·4678·"trace/trace-hw_nvme.h"

4676

#line·4678·"trace/trace-hw_nvme.h"

4677

········}

4677

········}

4678

····}

4678

····}

4679

}

4679

}

4680

static·inline·void·trace_pci_nvme_err_zone_boundary(uint64_t·slba,·uint32_t·nlb,·uint64_t·zcap)

4680

static·inline·void·trace_pci_nvme_err_zone_boundary(uint64_t·slba,·uint32_t·nlb,·uint64_t·zcap)

4692

static·inline·void·_nocheck__trace_pci_nvme_err_zone_invalid_write(uint64_t·slba,·uint64_t·wp)

4692

static·inline·void·_nocheck__trace_pci_nvme_err_zone_invalid_write(uint64_t·slba,·uint64_t·wp)

4693

{

4693

{

4694

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZONE_INVALID_WRITE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4694

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZONE_INVALID_WRITE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4695

········if·(message_with_timestamp)·{

4695

········if·(message_with_timestamp)·{

4696

············struct·timeval·_now;

4696

············struct·timeval·_now;

4697

············gettimeofday(&_now,·NULL);

4697

············gettimeofday(&_now,·NULL);

4699

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zone_invalid_write·"·"lba·0x%"PRIx64"·wp·0x%"PRIx64""·"\n",

4699

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zone_invalid_write·"·"lba·0x%"PRIx64"·wp·0x%"PRIx64""·"\n",

4700

·····················qemu_get_thread_id(),

4700

·····················qemu_get_thread_id(),

4701

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4701

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4702

·····················,·slba,·wp);

4702

·····················,·slba,·wp);

4703

#line·4705·"trace/trace-hw_nvme.h"

4703

#line·4705·"trace/trace-hw_nvme.h"

4704

········}·else·{

4704

········}·else·{

4706

············qemu_log("pci_nvme_err_zone_invalid_write·"·"lba·0x%"PRIx64"·wp·0x%"PRIx64""·"\n",·slba,·wp);

4706

············qemu_log("pci_nvme_err_zone_invalid_write·"·"lba·0x%"PRIx64"·wp·0x%"PRIx64""·"\n",·slba,·wp);

4707

#line·4709·"trace/trace-hw_nvme.h"

4707

#line·4709·"trace/trace-hw_nvme.h"

4708

········}

4708

········}

4709

····}

4709

····}

4710

}

4710

}

4711

static·inline·void·trace_pci_nvme_err_zone_invalid_write(uint64_t·slba,·uint64_t·wp)

4711

static·inline·void·trace_pci_nvme_err_zone_invalid_write(uint64_t·slba,·uint64_t·wp)

4723

static·inline·void·_nocheck__trace_pci_nvme_err_zone_write_not_ok(uint64_t·slba,·uint32_t·nlb,·uint16_t·status)

4723

static·inline·void·_nocheck__trace_pci_nvme_err_zone_write_not_ok(uint64_t·slba,·uint32_t·nlb,·uint16_t·status)

4724

{

4724

{

4725

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZONE_WRITE_NOT_OK)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4725

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZONE_WRITE_NOT_OK)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4726

········if·(message_with_timestamp)·{

4726

········if·(message_with_timestamp)·{

4727

············struct·timeval·_now;

4727

············struct·timeval·_now;

4728

············gettimeofday(&_now,·NULL);

4728

············gettimeofday(&_now,·NULL);

4730

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zone_write_not_ok·"·"slba=%"PRIu64",·nlb=%"PRIu32",·status=0x%"PRIx16""·"\n",

4730

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zone_write_not_ok·"·"slba=%"PRIu64",·nlb=%"PRIu32",·status=0x%"PRIx16""·"\n",

4731

·····················qemu_get_thread_id(),

4731

·····················qemu_get_thread_id(),

4732

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4732

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4733

·····················,·slba,·nlb,·status);

4733

·····················,·slba,·nlb,·status);

4734

#line·4736·"trace/trace-hw_nvme.h"

4734

#line·4736·"trace/trace-hw_nvme.h"

4735

········}·else·{

4735

········}·else·{

4737

············qemu_log("pci_nvme_err_zone_write_not_ok·"·"slba=%"PRIu64",·nlb=%"PRIu32",·status=0x%"PRIx16""·"\n",·slba,·nlb,·status);

4737

············qemu_log("pci_nvme_err_zone_write_not_ok·"·"slba=%"PRIu64",·nlb=%"PRIu32",·status=0x%"PRIx16""·"\n",·slba,·nlb,·status);

4738

#line·4740·"trace/trace-hw_nvme.h"

4738

#line·4740·"trace/trace-hw_nvme.h"

4739

········}

4739

········}

4740

····}

4740

····}

4741

}

4741

}

4742

static·inline·void·trace_pci_nvme_err_zone_write_not_ok(uint64_t·slba,·uint32_t·nlb,·uint16_t·status)

4742

static·inline·void·trace_pci_nvme_err_zone_write_not_ok(uint64_t·slba,·uint32_t·nlb,·uint16_t·status)

4754

static·inline·void·_nocheck__trace_pci_nvme_err_zone_read_not_ok(uint64_t·slba,·uint32_t·nlb,·uint16_t·status)

4754

static·inline·void·_nocheck__trace_pci_nvme_err_zone_read_not_ok(uint64_t·slba,·uint32_t·nlb,·uint16_t·status)

4755

{

4755

{

4756

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZONE_READ_NOT_OK)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4756

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZONE_READ_NOT_OK)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4757

········if·(message_with_timestamp)·{

4757

········if·(message_with_timestamp)·{

4758

············struct·timeval·_now;

4758

············struct·timeval·_now;

4759

············gettimeofday(&_now,·NULL);

4759

············gettimeofday(&_now,·NULL);

4761

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zone_read_not_ok·"·"slba=%"PRIu64",·nlb=%"PRIu32",·status=0x%"PRIx16""·"\n",

4761

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zone_read_not_ok·"·"slba=%"PRIu64",·nlb=%"PRIu32",·status=0x%"PRIx16""·"\n",

4762

·····················qemu_get_thread_id(),

4762

·····················qemu_get_thread_id(),

4763

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4763

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4764

·····················,·slba,·nlb,·status);

4764

·····················,·slba,·nlb,·status);

4765

#line·4767·"trace/trace-hw_nvme.h"

4765

#line·4767·"trace/trace-hw_nvme.h"

4766

········}·else·{

4766

········}·else·{

4768

············qemu_log("pci_nvme_err_zone_read_not_ok·"·"slba=%"PRIu64",·nlb=%"PRIu32",·status=0x%"PRIx16""·"\n",·slba,·nlb,·status);

4768

············qemu_log("pci_nvme_err_zone_read_not_ok·"·"slba=%"PRIu64",·nlb=%"PRIu32",·status=0x%"PRIx16""·"\n",·slba,·nlb,·status);

4769

#line·4771·"trace/trace-hw_nvme.h"

4769

#line·4771·"trace/trace-hw_nvme.h"

4770

········}

4770

········}

4771

····}

4771

····}

4772

}

4772

}

4773

static·inline·void·trace_pci_nvme_err_zone_read_not_ok(uint64_t·slba,·uint32_t·nlb,·uint16_t·status)

4773

static·inline·void·trace_pci_nvme_err_zone_read_not_ok(uint64_t·slba,·uint32_t·nlb,·uint16_t·status)

4785

static·inline·void·_nocheck__trace_pci_nvme_err_insuff_active_res(uint32_t·max_active)

4785

static·inline·void·_nocheck__trace_pci_nvme_err_insuff_active_res(uint32_t·max_active)

4786

{

4786

{

4787

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INSUFF_ACTIVE_RES)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4787

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INSUFF_ACTIVE_RES)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4788

········if·(message_with_timestamp)·{

4788

········if·(message_with_timestamp)·{

4789

············struct·timeval·_now;

4789

············struct·timeval·_now;

4790

············gettimeofday(&_now,·NULL);

4790

············gettimeofday(&_now,·NULL);

4792

············qemu_log("%d@%zu.%06zu:pci_nvme_err_insuff_active_res·"·"max_active=%"PRIu32"·zone·limit·exceeded"·"\n",

4792

············qemu_log("%d@%zu.%06zu:pci_nvme_err_insuff_active_res·"·"max_active=%"PRIu32"·zone·limit·exceeded"·"\n",

4793

·····················qemu_get_thread_id(),

4793

·····················qemu_get_thread_id(),

4794

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4794

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4795

·····················,·max_active);

4795

·····················,·max_active);

4796

#line·4798·"trace/trace-hw_nvme.h"

4796

#line·4798·"trace/trace-hw_nvme.h"

4797

········}·else·{

4797

········}·else·{

4799

············qemu_log("pci_nvme_err_insuff_active_res·"·"max_active=%"PRIu32"·zone·limit·exceeded"·"\n",·max_active);

4799

············qemu_log("pci_nvme_err_insuff_active_res·"·"max_active=%"PRIu32"·zone·limit·exceeded"·"\n",·max_active);

4800

#line·4802·"trace/trace-hw_nvme.h"

4800

#line·4802·"trace/trace-hw_nvme.h"

4801

········}

4801

········}

4802

····}

4802

····}

4803

}

4803

}

4804

static·inline·void·trace_pci_nvme_err_insuff_active_res(uint32_t·max_active)

4804

static·inline·void·trace_pci_nvme_err_insuff_active_res(uint32_t·max_active)

4816

static·inline·void·_nocheck__trace_pci_nvme_err_insuff_open_res(uint32_t·max_open)

4816

static·inline·void·_nocheck__trace_pci_nvme_err_insuff_open_res(uint32_t·max_open)

4817

{

4817

{

4818

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INSUFF_OPEN_RES)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4818

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INSUFF_OPEN_RES)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4819

········if·(message_with_timestamp)·{

4819

········if·(message_with_timestamp)·{

4820

············struct·timeval·_now;

4820

············struct·timeval·_now;

4821

············gettimeofday(&_now,·NULL);

4821

············gettimeofday(&_now,·NULL);

4823

············qemu_log("%d@%zu.%06zu:pci_nvme_err_insuff_open_res·"·"max_open=%"PRIu32"·zone·limit·exceeded"·"\n",

4823

············qemu_log("%d@%zu.%06zu:pci_nvme_err_insuff_open_res·"·"max_open=%"PRIu32"·zone·limit·exceeded"·"\n",

4824

·····················qemu_get_thread_id(),

4824

·····················qemu_get_thread_id(),

4825

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4825

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4826

·····················,·max_open);

4826

·····················,·max_open);

4827

#line·4829·"trace/trace-hw_nvme.h"

4827

#line·4829·"trace/trace-hw_nvme.h"

4828

········}·else·{

4828

········}·else·{

4830

············qemu_log("pci_nvme_err_insuff_open_res·"·"max_open=%"PRIu32"·zone·limit·exceeded"·"\n",·max_open);

4830

············qemu_log("pci_nvme_err_insuff_open_res·"·"max_open=%"PRIu32"·zone·limit·exceeded"·"\n",·max_open);

4831

#line·4833·"trace/trace-hw_nvme.h"

4831

#line·4833·"trace/trace-hw_nvme.h"

4832

········}

4832

········}

4833

····}

4833

····}

4834

}

4834

}

4835

static·inline·void·trace_pci_nvme_err_insuff_open_res(uint32_t·max_open)

4835

static·inline·void·trace_pci_nvme_err_insuff_open_res(uint32_t·max_open)

4847

static·inline·void·_nocheck__trace_pci_nvme_err_zd_extension_map_error(uint32_t·zone_idx)

4847

static·inline·void·_nocheck__trace_pci_nvme_err_zd_extension_map_error(uint32_t·zone_idx)

4848

{

4848

{

4849

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZD_EXTENSION_MAP_ERROR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4849

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_ZD_EXTENSION_MAP_ERROR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4850

········if·(message_with_timestamp)·{

4850

········if·(message_with_timestamp)·{

4851

············struct·timeval·_now;

4851

············struct·timeval·_now;

4852

············gettimeofday(&_now,·NULL);

4852

············gettimeofday(&_now,·NULL);

4854

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zd_extension_map_error·"·"can't·map·descriptor·extension·for·zone_idx=%"PRIu32""·"\n",

4854

············qemu_log("%d@%zu.%06zu:pci_nvme_err_zd_extension_map_error·"·"can't·map·descriptor·extension·for·zone_idx=%"PRIu32""·"\n",

4855

·····················qemu_get_thread_id(),

4855

·····················qemu_get_thread_id(),

4856

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4856

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4857

·····················,·zone_idx);

4857

·····················,·zone_idx);

4858

#line·4860·"trace/trace-hw_nvme.h"

4858

#line·4860·"trace/trace-hw_nvme.h"

4859

········}·else·{

4859

········}·else·{

4861

············qemu_log("pci_nvme_err_zd_extension_map_error·"·"can't·map·descriptor·extension·for·zone_idx=%"PRIu32""·"\n",·zone_idx);

4861

············qemu_log("pci_nvme_err_zd_extension_map_error·"·"can't·map·descriptor·extension·for·zone_idx=%"PRIu32""·"\n",·zone_idx);

4862

#line·4864·"trace/trace-hw_nvme.h"

4862

#line·4864·"trace/trace-hw_nvme.h"

4863

········}

4863

········}

4864

····}

4864

····}

4865

}

4865

}

4866

static·inline·void·trace_pci_nvme_err_zd_extension_map_error(uint32_t·zone_idx)

4866

static·inline·void·trace_pci_nvme_err_zd_extension_map_error(uint32_t·zone_idx)

4878

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_iocsci(uint32_t·idx)

4878

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_iocsci(uint32_t·idx)

4879

{

4879

{

4880

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_IOCSCI)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4880

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_IOCSCI)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4881

········if·(message_with_timestamp)·{

4881

········if·(message_with_timestamp)·{

4882

············struct·timeval·_now;

4882

············struct·timeval·_now;

4883

············gettimeofday(&_now,·NULL);

4883

············gettimeofday(&_now,·NULL);

4885

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_iocsci·"·"unsupported·command·set·combination·index·%"PRIu32""·"\n",

4885

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_iocsci·"·"unsupported·command·set·combination·index·%"PRIu32""·"\n",

4886

·····················qemu_get_thread_id(),

4886

·····················qemu_get_thread_id(),

4887

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4887

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4888

·····················,·idx);

4888

·····················,·idx);

4889

#line·4891·"trace/trace-hw_nvme.h"

4889

#line·4891·"trace/trace-hw_nvme.h"

4890

········}·else·{

4890

········}·else·{

4892

············qemu_log("pci_nvme_err_invalid_iocsci·"·"unsupported·command·set·combination·index·%"PRIu32""·"\n",·idx);

4892

············qemu_log("pci_nvme_err_invalid_iocsci·"·"unsupported·command·set·combination·index·%"PRIu32""·"\n",·idx);

4893

#line·4895·"trace/trace-hw_nvme.h"

4893

#line·4895·"trace/trace-hw_nvme.h"

4894

········}

4894

········}

4895

····}

4895

····}

4896

}

4896

}

4897

static·inline·void·trace_pci_nvme_err_invalid_iocsci(uint32_t·idx)

4897

static·inline·void·trace_pci_nvme_err_invalid_iocsci(uint32_t·idx)

4909

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_del_sq(uint16_t·qid)

4909

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_del_sq(uint16_t·qid)

4910

{

4910

{

4911

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_DEL_SQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4911

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_DEL_SQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4912

········if·(message_with_timestamp)·{

4912

········if·(message_with_timestamp)·{

4913

············struct·timeval·_now;

4913

············struct·timeval·_now;

4914

············gettimeofday(&_now,·NULL);

4914

············gettimeofday(&_now,·NULL);

4916

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_del_sq·"·"invalid·submission·queue·deletion,·sid=%"PRIu16""·"\n",

4916

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_del_sq·"·"invalid·submission·queue·deletion,·sid=%"PRIu16""·"\n",

4917

·····················qemu_get_thread_id(),

4917

·····················qemu_get_thread_id(),

4918

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4918

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4919

·····················,·qid);

4919

·····················,·qid);

4920

#line·4922·"trace/trace-hw_nvme.h"

4920

#line·4922·"trace/trace-hw_nvme.h"

4921

········}·else·{

4921

········}·else·{

4923

············qemu_log("pci_nvme_err_invalid_del_sq·"·"invalid·submission·queue·deletion,·sid=%"PRIu16""·"\n",·qid);

4923

············qemu_log("pci_nvme_err_invalid_del_sq·"·"invalid·submission·queue·deletion,·sid=%"PRIu16""·"\n",·qid);

4924

#line·4926·"trace/trace-hw_nvme.h"

4924

#line·4926·"trace/trace-hw_nvme.h"

4925

········}

4925

········}

4926

····}

4926

····}

4927

}

4927

}

4928

static·inline·void·trace_pci_nvme_err_invalid_del_sq(uint16_t·qid)

4928

static·inline·void·trace_pci_nvme_err_invalid_del_sq(uint16_t·qid)

4940

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_sq_cqid(uint16_t·cqid)

4940

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_sq_cqid(uint16_t·cqid)

4941

{

4941

{

4942

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_CQID)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4942

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_CQID)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4943

········if·(message_with_timestamp)·{

4943

········if·(message_with_timestamp)·{

4944

············struct·timeval·_now;

4944

············struct·timeval·_now;

4945

············gettimeofday(&_now,·NULL);

4945

············gettimeofday(&_now,·NULL);

4947

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_sq_cqid·"·"failed·creating·submission·queue,·invalid·cqid=%"PRIu16""·"\n",

4947

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_sq_cqid·"·"failed·creating·submission·queue,·invalid·cqid=%"PRIu16""·"\n",

4948

·····················qemu_get_thread_id(),

4948

·····················qemu_get_thread_id(),

4949

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4949

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4950

·····················,·cqid);

4950

·····················,·cqid);

4951

#line·4953·"trace/trace-hw_nvme.h"

4951

#line·4953·"trace/trace-hw_nvme.h"

4952

········}·else·{

4952

········}·else·{

4954

············qemu_log("pci_nvme_err_invalid_create_sq_cqid·"·"failed·creating·submission·queue,·invalid·cqid=%"PRIu16""·"\n",·cqid);

4954

············qemu_log("pci_nvme_err_invalid_create_sq_cqid·"·"failed·creating·submission·queue,·invalid·cqid=%"PRIu16""·"\n",·cqid);

4955

#line·4957·"trace/trace-hw_nvme.h"

4955

#line·4957·"trace/trace-hw_nvme.h"

4956

········}

4956

········}

4957

····}

4957

····}

4958

}

4958

}

4959

static·inline·void·trace_pci_nvme_err_invalid_create_sq_cqid(uint16_t·cqid)

4959

static·inline·void·trace_pci_nvme_err_invalid_create_sq_cqid(uint16_t·cqid)

4971

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_sq_sqid(uint16_t·sqid)

4971

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_sq_sqid(uint16_t·sqid)

4972

{

4972

{

4973

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_SQID)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4973

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_SQID)·&&·qemu_loglevel_mask(LOG_TRACE))·{

4974

········if·(message_with_timestamp)·{

4974

········if·(message_with_timestamp)·{

4975

············struct·timeval·_now;

4975

············struct·timeval·_now;

4976

············gettimeofday(&_now,·NULL);

4976

············gettimeofday(&_now,·NULL);

4978

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_sq_sqid·"·"failed·creating·submission·queue,·invalid·sqid=%"PRIu16""·"\n",

4978

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_sq_sqid·"·"failed·creating·submission·queue,·invalid·sqid=%"PRIu16""·"\n",

4979

·····················qemu_get_thread_id(),

4979

·····················qemu_get_thread_id(),

4980

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4980

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

4981

·····················,·sqid);

4981

·····················,·sqid);

4982

#line·4984·"trace/trace-hw_nvme.h"

4982

#line·4984·"trace/trace-hw_nvme.h"

4983

········}·else·{

4983

········}·else·{

4985

············qemu_log("pci_nvme_err_invalid_create_sq_sqid·"·"failed·creating·submission·queue,·invalid·sqid=%"PRIu16""·"\n",·sqid);

4985

············qemu_log("pci_nvme_err_invalid_create_sq_sqid·"·"failed·creating·submission·queue,·invalid·sqid=%"PRIu16""·"\n",·sqid);

4986

#line·4988·"trace/trace-hw_nvme.h"

4986

#line·4988·"trace/trace-hw_nvme.h"

4987

········}

4987

········}

4988

····}

4988

····}

4989

}

4989

}

4990

static·inline·void·trace_pci_nvme_err_invalid_create_sq_sqid(uint16_t·sqid)

4990

static·inline·void·trace_pci_nvme_err_invalid_create_sq_sqid(uint16_t·sqid)

5002

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_sq_size(uint16_t·qsize)

5002

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_sq_size(uint16_t·qsize)

5003

{

5003

{

5004

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_SIZE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5004

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_SIZE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5005

········if·(message_with_timestamp)·{

5005

········if·(message_with_timestamp)·{

5006

············struct·timeval·_now;

5006

············struct·timeval·_now;

5007

············gettimeofday(&_now,·NULL);

5007

············gettimeofday(&_now,·NULL);

5009

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_sq_size·"·"failed·creating·submission·queue,·invalid·qsize=%"PRIu16""·"\n",

5009

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_sq_size·"·"failed·creating·submission·queue,·invalid·qsize=%"PRIu16""·"\n",

5010

·····················qemu_get_thread_id(),

5010

·····················qemu_get_thread_id(),

5011

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5011

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5012

·····················,·qsize);

5012

·····················,·qsize);

5013

#line·5015·"trace/trace-hw_nvme.h"

5013

#line·5015·"trace/trace-hw_nvme.h"

5014

········}·else·{

5014

········}·else·{

5016

············qemu_log("pci_nvme_err_invalid_create_sq_size·"·"failed·creating·submission·queue,·invalid·qsize=%"PRIu16""·"\n",·qsize);

5016

············qemu_log("pci_nvme_err_invalid_create_sq_size·"·"failed·creating·submission·queue,·invalid·qsize=%"PRIu16""·"\n",·qsize);

5017

#line·5019·"trace/trace-hw_nvme.h"

5017

#line·5019·"trace/trace-hw_nvme.h"

5018

········}

5018

········}

5019

····}

5019

····}

5020

}

5020

}

5021

static·inline·void·trace_pci_nvme_err_invalid_create_sq_size(uint16_t·qsize)

5021

static·inline·void·trace_pci_nvme_err_invalid_create_sq_size(uint16_t·qsize)

5033

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_sq_addr(uint64_t·addr)

5033

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_sq_addr(uint64_t·addr)

5034

{

5034

{

5035

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_ADDR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5035

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_ADDR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5036

········if·(message_with_timestamp)·{

5036

········if·(message_with_timestamp)·{

5037

············struct·timeval·_now;

5037

············struct·timeval·_now;

5038

············gettimeofday(&_now,·NULL);

5038

············gettimeofday(&_now,·NULL);

5040

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_sq_addr·"·"failed·creating·submission·queue,·addr=0x%"PRIx64""·"\n",

5040

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_sq_addr·"·"failed·creating·submission·queue,·addr=0x%"PRIx64""·"\n",

5041

·····················qemu_get_thread_id(),

5041

·····················qemu_get_thread_id(),

5042

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5042

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5043

·····················,·addr);

5043

·····················,·addr);

5044

#line·5046·"trace/trace-hw_nvme.h"

5044

#line·5046·"trace/trace-hw_nvme.h"

5045

········}·else·{

5045

········}·else·{

5047

············qemu_log("pci_nvme_err_invalid_create_sq_addr·"·"failed·creating·submission·queue,·addr=0x%"PRIx64""·"\n",·addr);

5047

············qemu_log("pci_nvme_err_invalid_create_sq_addr·"·"failed·creating·submission·queue,·addr=0x%"PRIx64""·"\n",·addr);

5048

#line·5050·"trace/trace-hw_nvme.h"

5048

#line·5050·"trace/trace-hw_nvme.h"

5049

········}

5049

········}

5050

····}

5050

····}

5051

}

5051

}

5052

static·inline·void·trace_pci_nvme_err_invalid_create_sq_addr(uint64_t·addr)

5052

static·inline·void·trace_pci_nvme_err_invalid_create_sq_addr(uint64_t·addr)

5064

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_sq_qflags(uint16_t·qflags)

5064

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_sq_qflags(uint16_t·qflags)

5065

{

5065

{

5066

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_QFLAGS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5066

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_SQ_QFLAGS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5067

········if·(message_with_timestamp)·{

5067

········if·(message_with_timestamp)·{

5068

············struct·timeval·_now;

5068

············struct·timeval·_now;

5069

············gettimeofday(&_now,·NULL);

5069

············gettimeofday(&_now,·NULL);

5071

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_sq_qflags·"·"failed·creating·submission·queue,·qflags=%"PRIu16""·"\n",

5071

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_sq_qflags·"·"failed·creating·submission·queue,·qflags=%"PRIu16""·"\n",

5072

·····················qemu_get_thread_id(),

5072

·····················qemu_get_thread_id(),

5073

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5073

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5074

·····················,·qflags);

5074

·····················,·qflags);

5075

#line·5077·"trace/trace-hw_nvme.h"

5075

#line·5077·"trace/trace-hw_nvme.h"

5076

········}·else·{

5076

········}·else·{

5078

············qemu_log("pci_nvme_err_invalid_create_sq_qflags·"·"failed·creating·submission·queue,·qflags=%"PRIu16""·"\n",·qflags);

5078

············qemu_log("pci_nvme_err_invalid_create_sq_qflags·"·"failed·creating·submission·queue,·qflags=%"PRIu16""·"\n",·qflags);

5079

#line·5081·"trace/trace-hw_nvme.h"

5079

#line·5081·"trace/trace-hw_nvme.h"

5080

········}

5080

········}

5081

····}

5081

····}

5082

}

5082

}

5083

static·inline·void·trace_pci_nvme_err_invalid_create_sq_qflags(uint16_t·qflags)

5083

static·inline·void·trace_pci_nvme_err_invalid_create_sq_qflags(uint16_t·qflags)

5095

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_del_cq_cqid(uint16_t·cqid)

5095

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_del_cq_cqid(uint16_t·cqid)

5096

{

5096

{

5097

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_DEL_CQ_CQID)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5097

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_DEL_CQ_CQID)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5098

········if·(message_with_timestamp)·{

5098

········if·(message_with_timestamp)·{

5099

············struct·timeval·_now;

5099

············struct·timeval·_now;

5100

············gettimeofday(&_now,·NULL);

5100

············gettimeofday(&_now,·NULL);

5102

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_del_cq_cqid·"·"failed·deleting·completion·queue,·cqid=%"PRIu16""·"\n",

5102

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_del_cq_cqid·"·"failed·deleting·completion·queue,·cqid=%"PRIu16""·"\n",

5103

·····················qemu_get_thread_id(),

5103

·····················qemu_get_thread_id(),

5104

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5104

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5105

·····················,·cqid);

5105

·····················,·cqid);

5106

#line·5108·"trace/trace-hw_nvme.h"

5106

#line·5108·"trace/trace-hw_nvme.h"

5107

········}·else·{

5107

········}·else·{

5109

············qemu_log("pci_nvme_err_invalid_del_cq_cqid·"·"failed·deleting·completion·queue,·cqid=%"PRIu16""·"\n",·cqid);

5109

············qemu_log("pci_nvme_err_invalid_del_cq_cqid·"·"failed·deleting·completion·queue,·cqid=%"PRIu16""·"\n",·cqid);

5110

#line·5112·"trace/trace-hw_nvme.h"

5110

#line·5112·"trace/trace-hw_nvme.h"

5111

········}

5111

········}

5112

····}

5112

····}

5113

}

5113

}

5114

static·inline·void·trace_pci_nvme_err_invalid_del_cq_cqid(uint16_t·cqid)

5114

static·inline·void·trace_pci_nvme_err_invalid_del_cq_cqid(uint16_t·cqid)

5126

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_del_cq_notempty(uint16_t·cqid)

5126

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_del_cq_notempty(uint16_t·cqid)

5127

{

5127

{

5128

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_DEL_CQ_NOTEMPTY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5128

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_DEL_CQ_NOTEMPTY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5129

········if·(message_with_timestamp)·{

5129

········if·(message_with_timestamp)·{

5130

············struct·timeval·_now;

5130

············struct·timeval·_now;

5131

············gettimeofday(&_now,·NULL);

5131

············gettimeofday(&_now,·NULL);

5133

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_del_cq_notempty·"·"failed·deleting·completion·queue,·it·is·not·empty,·cqid=%"PRIu16""·"\n",

5133

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_del_cq_notempty·"·"failed·deleting·completion·queue,·it·is·not·empty,·cqid=%"PRIu16""·"\n",

5134

·····················qemu_get_thread_id(),

5134

·····················qemu_get_thread_id(),

5135

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5135

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5136

·····················,·cqid);

5136

·····················,·cqid);

5137

#line·5139·"trace/trace-hw_nvme.h"

5137

#line·5139·"trace/trace-hw_nvme.h"

5138

········}·else·{

5138

········}·else·{

5140

············qemu_log("pci_nvme_err_invalid_del_cq_notempty·"·"failed·deleting·completion·queue,·it·is·not·empty,·cqid=%"PRIu16""·"\n",·cqid);

5140

············qemu_log("pci_nvme_err_invalid_del_cq_notempty·"·"failed·deleting·completion·queue,·it·is·not·empty,·cqid=%"PRIu16""·"\n",·cqid);

5141

#line·5143·"trace/trace-hw_nvme.h"

5141

#line·5143·"trace/trace-hw_nvme.h"

5142

········}

5142

········}

5143

····}

5143

····}

5144

}

5144

}

5145

static·inline·void·trace_pci_nvme_err_invalid_del_cq_notempty(uint16_t·cqid)

5145

static·inline·void·trace_pci_nvme_err_invalid_del_cq_notempty(uint16_t·cqid)

5157

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_cq_cqid(uint16_t·cqid)

5157

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_cq_cqid(uint16_t·cqid)

5158

{

5158

{

5159

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_CQID)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5159

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_CQID)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5160

········if·(message_with_timestamp)·{

5160

········if·(message_with_timestamp)·{

5161

············struct·timeval·_now;

5161

············struct·timeval·_now;

5162

············gettimeofday(&_now,·NULL);

5162

············gettimeofday(&_now,·NULL);

5164

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_cq_cqid·"·"failed·creating·completion·queue,·cqid=%"PRIu16""·"\n",

5164

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_cq_cqid·"·"failed·creating·completion·queue,·cqid=%"PRIu16""·"\n",

5165

·····················qemu_get_thread_id(),

5165

·····················qemu_get_thread_id(),

5166

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5166

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5167

·····················,·cqid);

5167

·····················,·cqid);

5168

#line·5170·"trace/trace-hw_nvme.h"

5168

#line·5170·"trace/trace-hw_nvme.h"

5169

········}·else·{

5169

········}·else·{

5171

············qemu_log("pci_nvme_err_invalid_create_cq_cqid·"·"failed·creating·completion·queue,·cqid=%"PRIu16""·"\n",·cqid);

5171

············qemu_log("pci_nvme_err_invalid_create_cq_cqid·"·"failed·creating·completion·queue,·cqid=%"PRIu16""·"\n",·cqid);

5172

#line·5174·"trace/trace-hw_nvme.h"

5172

#line·5174·"trace/trace-hw_nvme.h"

5173

········}

5173

········}

5174

····}

5174

····}

5175

}

5175

}

5176

static·inline·void·trace_pci_nvme_err_invalid_create_cq_cqid(uint16_t·cqid)

5176

static·inline·void·trace_pci_nvme_err_invalid_create_cq_cqid(uint16_t·cqid)

5188

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_cq_size(uint16_t·size)

5188

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_cq_size(uint16_t·size)

5189

{

5189

{

5190

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_SIZE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5190

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_SIZE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5191

········if·(message_with_timestamp)·{

5191

········if·(message_with_timestamp)·{

5192

············struct·timeval·_now;

5192

············struct·timeval·_now;

5193

············gettimeofday(&_now,·NULL);

5193

············gettimeofday(&_now,·NULL);

5195

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_cq_size·"·"failed·creating·completion·queue,·size=%"PRIu16""·"\n",

5195

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_cq_size·"·"failed·creating·completion·queue,·size=%"PRIu16""·"\n",

5196

·····················qemu_get_thread_id(),

5196

·····················qemu_get_thread_id(),

5197

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5197

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5198

·····················,·size);

5198

·····················,·size);

5199

#line·5201·"trace/trace-hw_nvme.h"

5199

#line·5201·"trace/trace-hw_nvme.h"

5200

········}·else·{

5200

········}·else·{

5202

············qemu_log("pci_nvme_err_invalid_create_cq_size·"·"failed·creating·completion·queue,·size=%"PRIu16""·"\n",·size);

5202

············qemu_log("pci_nvme_err_invalid_create_cq_size·"·"failed·creating·completion·queue,·size=%"PRIu16""·"\n",·size);

5203

#line·5205·"trace/trace-hw_nvme.h"

5203

#line·5205·"trace/trace-hw_nvme.h"

5204

········}

5204

········}

5205

····}

5205

····}

5206

}

5206

}

5207

static·inline·void·trace_pci_nvme_err_invalid_create_cq_size(uint16_t·size)

5207

static·inline·void·trace_pci_nvme_err_invalid_create_cq_size(uint16_t·size)

5219

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_cq_addr(uint64_t·addr)

5219

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_cq_addr(uint64_t·addr)

5220

{

5220

{

5221

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_ADDR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5221

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_ADDR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5222

········if·(message_with_timestamp)·{

5222

········if·(message_with_timestamp)·{

5223

············struct·timeval·_now;

5223

············struct·timeval·_now;

5224

············gettimeofday(&_now,·NULL);

5224

············gettimeofday(&_now,·NULL);

5226

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_cq_addr·"·"failed·creating·completion·queue,·addr=0x%"PRIx64""·"\n",

5226

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_cq_addr·"·"failed·creating·completion·queue,·addr=0x%"PRIx64""·"\n",

5227

·····················qemu_get_thread_id(),

5227

·····················qemu_get_thread_id(),

5228

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5228

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5229

·····················,·addr);

5229

·····················,·addr);

5230

#line·5232·"trace/trace-hw_nvme.h"

5230

#line·5232·"trace/trace-hw_nvme.h"

5231

········}·else·{

5231

········}·else·{

5233

············qemu_log("pci_nvme_err_invalid_create_cq_addr·"·"failed·creating·completion·queue,·addr=0x%"PRIx64""·"\n",·addr);

5233

············qemu_log("pci_nvme_err_invalid_create_cq_addr·"·"failed·creating·completion·queue,·addr=0x%"PRIx64""·"\n",·addr);

5234

#line·5236·"trace/trace-hw_nvme.h"

5234

#line·5236·"trace/trace-hw_nvme.h"

5235

········}

5235

········}

5236

····}

5236

····}

5237

}

5237

}

5238

static·inline·void·trace_pci_nvme_err_invalid_create_cq_addr(uint64_t·addr)

5238

static·inline·void·trace_pci_nvme_err_invalid_create_cq_addr(uint64_t·addr)

5250

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_cq_vector(uint16_t·vector)

5250

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_cq_vector(uint16_t·vector)

5251

{

5251

{

5252

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_VECTOR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5252

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_VECTOR)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5253

········if·(message_with_timestamp)·{

5253

········if·(message_with_timestamp)·{

5254

············struct·timeval·_now;

5254

············struct·timeval·_now;

5255

············gettimeofday(&_now,·NULL);

5255

············gettimeofday(&_now,·NULL);

5257

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_cq_vector·"·"failed·creating·completion·queue,·vector=%"PRIu16""·"\n",

5257

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_cq_vector·"·"failed·creating·completion·queue,·vector=%"PRIu16""·"\n",

5258

·····················qemu_get_thread_id(),

5258

·····················qemu_get_thread_id(),

5259

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5259

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5260

·····················,·vector);

5260

·····················,·vector);

5261

#line·5263·"trace/trace-hw_nvme.h"

5261

#line·5263·"trace/trace-hw_nvme.h"

5262

········}·else·{

5262

········}·else·{

5264

············qemu_log("pci_nvme_err_invalid_create_cq_vector·"·"failed·creating·completion·queue,·vector=%"PRIu16""·"\n",·vector);

5264

············qemu_log("pci_nvme_err_invalid_create_cq_vector·"·"failed·creating·completion·queue,·vector=%"PRIu16""·"\n",·vector);

5265

#line·5267·"trace/trace-hw_nvme.h"

5265

#line·5267·"trace/trace-hw_nvme.h"

5266

········}

5266

········}

5267

····}

5267

····}

5268

}

5268

}

5269

static·inline·void·trace_pci_nvme_err_invalid_create_cq_vector(uint16_t·vector)

5269

static·inline·void·trace_pci_nvme_err_invalid_create_cq_vector(uint16_t·vector)

5281

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_cq_qflags(uint16_t·qflags)

5281

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_create_cq_qflags(uint16_t·qflags)

5282

{

5282

{

5283

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_QFLAGS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5283

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_CREATE_CQ_QFLAGS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5284

········if·(message_with_timestamp)·{

5284

········if·(message_with_timestamp)·{

5285

············struct·timeval·_now;

5285

············struct·timeval·_now;

5286

············gettimeofday(&_now,·NULL);

5286

············gettimeofday(&_now,·NULL);

5288

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_cq_qflags·"·"failed·creating·completion·queue,·qflags=%"PRIu16""·"\n",

5288

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_create_cq_qflags·"·"failed·creating·completion·queue,·qflags=%"PRIu16""·"\n",

5289

·····················qemu_get_thread_id(),

5289

·····················qemu_get_thread_id(),

5290

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5290

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5291

·····················,·qflags);

5291

·····················,·qflags);

5292

#line·5294·"trace/trace-hw_nvme.h"

5292

#line·5294·"trace/trace-hw_nvme.h"

5293

········}·else·{

5293

········}·else·{

5295

············qemu_log("pci_nvme_err_invalid_create_cq_qflags·"·"failed·creating·completion·queue,·qflags=%"PRIu16""·"\n",·qflags);

5295

············qemu_log("pci_nvme_err_invalid_create_cq_qflags·"·"failed·creating·completion·queue,·qflags=%"PRIu16""·"\n",·qflags);

5296

#line·5298·"trace/trace-hw_nvme.h"

5296

#line·5298·"trace/trace-hw_nvme.h"

5297

········}

5297

········}

5298

····}

5298

····}

5299

}

5299

}

5300

static·inline·void·trace_pci_nvme_err_invalid_create_cq_qflags(uint16_t·qflags)

5300

static·inline·void·trace_pci_nvme_err_invalid_create_cq_qflags(uint16_t·qflags)

5312

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_identify_cns(uint16_t·cns)

5312

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_identify_cns(uint16_t·cns)

5313

{

5313

{

5314

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_IDENTIFY_CNS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5314

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_IDENTIFY_CNS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5315

········if·(message_with_timestamp)·{

5315

········if·(message_with_timestamp)·{

5316

············struct·timeval·_now;

5316

············struct·timeval·_now;

5317

············gettimeofday(&_now,·NULL);

5317

············gettimeofday(&_now,·NULL);

5319

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_identify_cns·"·"identify,·invalid·cns=0x%"PRIx16""·"\n",

5319

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_identify_cns·"·"identify,·invalid·cns=0x%"PRIx16""·"\n",

5320

·····················qemu_get_thread_id(),

5320

·····················qemu_get_thread_id(),

5321

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5321

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5322

·····················,·cns);

5322

·····················,·cns);

5323

#line·5325·"trace/trace-hw_nvme.h"

5323

#line·5325·"trace/trace-hw_nvme.h"

5324

········}·else·{

5324

········}·else·{

5326

············qemu_log("pci_nvme_err_invalid_identify_cns·"·"identify,·invalid·cns=0x%"PRIx16""·"\n",·cns);

5326

············qemu_log("pci_nvme_err_invalid_identify_cns·"·"identify,·invalid·cns=0x%"PRIx16""·"\n",·cns);

5327

#line·5329·"trace/trace-hw_nvme.h"

5327

#line·5329·"trace/trace-hw_nvme.h"

5328

········}

5328

········}

5329

····}

5329

····}

5330

}

5330

}

5331

static·inline·void·trace_pci_nvme_err_invalid_identify_cns(uint16_t·cns)

5331

static·inline·void·trace_pci_nvme_err_invalid_identify_cns(uint16_t·cns)

5343

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_getfeat(int·dw10)

5343

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_getfeat(int·dw10)

5344

{

5344

{

5345

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_GETFEAT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5345

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_GETFEAT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5346

········if·(message_with_timestamp)·{

5346

········if·(message_with_timestamp)·{

5347

············struct·timeval·_now;

5347

············struct·timeval·_now;

5348

············gettimeofday(&_now,·NULL);

5348

············gettimeofday(&_now,·NULL);

5350

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_getfeat·"·"invalid·get·features,·dw10=0x%"PRIx32""·"\n",

5350

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_getfeat·"·"invalid·get·features,·dw10=0x%"PRIx32""·"\n",

5351

·····················qemu_get_thread_id(),

5351

·····················qemu_get_thread_id(),

5352

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5352

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5353

·····················,·dw10);

5353

·····················,·dw10);

5354

#line·5356·"trace/trace-hw_nvme.h"

5354

#line·5356·"trace/trace-hw_nvme.h"

5355

········}·else·{

5355

········}·else·{

5357

············qemu_log("pci_nvme_err_invalid_getfeat·"·"invalid·get·features,·dw10=0x%"PRIx32""·"\n",·dw10);

5357

············qemu_log("pci_nvme_err_invalid_getfeat·"·"invalid·get·features,·dw10=0x%"PRIx32""·"\n",·dw10);

5358

#line·5360·"trace/trace-hw_nvme.h"

5358

#line·5360·"trace/trace-hw_nvme.h"

5359

········}

5359

········}

5360

····}

5360

····}

5361

}

5361

}

5362

static·inline·void·trace_pci_nvme_err_invalid_getfeat(int·dw10)

5362

static·inline·void·trace_pci_nvme_err_invalid_getfeat(int·dw10)

5374

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_setfeat(uint32_t·dw10)

5374

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_setfeat(uint32_t·dw10)

5375

{

5375

{

5376

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_SETFEAT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5376

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_SETFEAT)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5377

········if·(message_with_timestamp)·{

5377

········if·(message_with_timestamp)·{

5378

············struct·timeval·_now;

5378

············struct·timeval·_now;

5379

············gettimeofday(&_now,·NULL);

5379

············gettimeofday(&_now,·NULL);

5381

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_setfeat·"·"invalid·set·features,·dw10=0x%"PRIx32""·"\n",

5381

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_setfeat·"·"invalid·set·features,·dw10=0x%"PRIx32""·"\n",

5382

·····················qemu_get_thread_id(),

5382

·····················qemu_get_thread_id(),

5383

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5383

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5384

·····················,·dw10);

5384

·····················,·dw10);

5385

#line·5387·"trace/trace-hw_nvme.h"

5385

#line·5387·"trace/trace-hw_nvme.h"

5386

········}·else·{

5386

········}·else·{

5388

············qemu_log("pci_nvme_err_invalid_setfeat·"·"invalid·set·features,·dw10=0x%"PRIx32""·"\n",·dw10);

5388

············qemu_log("pci_nvme_err_invalid_setfeat·"·"invalid·set·features,·dw10=0x%"PRIx32""·"\n",·dw10);

5389

#line·5391·"trace/trace-hw_nvme.h"

5389

#line·5391·"trace/trace-hw_nvme.h"

5390

········}

5390

········}

5391

····}

5391

····}

5392

}

5392

}

5393

static·inline·void·trace_pci_nvme_err_invalid_setfeat(uint32_t·dw10)

5393

static·inline·void·trace_pci_nvme_err_invalid_setfeat(uint32_t·dw10)

5405

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_log_page(uint16_t·cid,·uint16_t·lid)

5405

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_log_page(uint16_t·cid,·uint16_t·lid)

5406

{

5406

{

5407

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_LOG_PAGE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5407

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_LOG_PAGE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5408

········if·(message_with_timestamp)·{

5408

········if·(message_with_timestamp)·{

5409

············struct·timeval·_now;

5409

············struct·timeval·_now;

5410

············gettimeofday(&_now,·NULL);

5410

············gettimeofday(&_now,·NULL);

5412

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_log_page·"·"cid·%"PRIu16"·lid·0x%"PRIx16""·"\n",

5412

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_log_page·"·"cid·%"PRIu16"·lid·0x%"PRIx16""·"\n",

5413

·····················qemu_get_thread_id(),

5413

·····················qemu_get_thread_id(),

5414

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5414

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5415

·····················,·cid,·lid);

5415

·····················,·cid,·lid);

5416

#line·5418·"trace/trace-hw_nvme.h"

5416

#line·5418·"trace/trace-hw_nvme.h"

5417

········}·else·{

5417

········}·else·{

5419

············qemu_log("pci_nvme_err_invalid_log_page·"·"cid·%"PRIu16"·lid·0x%"PRIx16""·"\n",·cid,·lid);

5419

············qemu_log("pci_nvme_err_invalid_log_page·"·"cid·%"PRIu16"·lid·0x%"PRIx16""·"\n",·cid,·lid);

5420

#line·5422·"trace/trace-hw_nvme.h"

5420

#line·5422·"trace/trace-hw_nvme.h"

5421

········}

5421

········}

5422

····}

5422

····}

5423

}

5423

}

5424

static·inline·void·trace_pci_nvme_err_invalid_log_page(uint16_t·cid,·uint16_t·lid)

5424

static·inline·void·trace_pci_nvme_err_invalid_log_page(uint16_t·cid,·uint16_t·lid)

5436

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_cq(void)

5436

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_cq(void)

5437

{

5437

{

5438

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_CQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5438

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_CQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5439

········if·(message_with_timestamp)·{

5439

········if·(message_with_timestamp)·{

5440

············struct·timeval·_now;

5440

············struct·timeval·_now;

5441

············gettimeofday(&_now,·NULL);

5441

············gettimeofday(&_now,·NULL);

5443

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_cq·"·"nvme_start_ctrl·failed·because·there·are·non-admin·completion·queues"·"\n",

5443

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_cq·"·"nvme_start_ctrl·failed·because·there·are·non-admin·completion·queues"·"\n",

5444

·····················qemu_get_thread_id(),

5444

·····················qemu_get_thread_id(),

5445

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5445

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5446

·····················);

5446

·····················);

5447

#line·5449·"trace/trace-hw_nvme.h"

5447

#line·5449·"trace/trace-hw_nvme.h"

5448

········}·else·{

5448

········}·else·{

5450

············qemu_log("pci_nvme_err_startfail_cq·"·"nvme_start_ctrl·failed·because·there·are·non-admin·completion·queues"·"\n");

5450

············qemu_log("pci_nvme_err_startfail_cq·"·"nvme_start_ctrl·failed·because·there·are·non-admin·completion·queues"·"\n");

5451

#line·5453·"trace/trace-hw_nvme.h"

5451

#line·5453·"trace/trace-hw_nvme.h"

5452

········}

5452

········}

5453

····}

5453

····}

5454

}

5454

}

5455

static·inline·void·trace_pci_nvme_err_startfail_cq(void)

5455

static·inline·void·trace_pci_nvme_err_startfail_cq(void)

5467

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_sq(void)

5467

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_sq(void)

5468

{

5468

{

5469

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_SQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5469

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_SQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5470

········if·(message_with_timestamp)·{

5470

········if·(message_with_timestamp)·{

5471

············struct·timeval·_now;

5471

············struct·timeval·_now;

5472

············gettimeofday(&_now,·NULL);

5472

············gettimeofday(&_now,·NULL);

5474

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_sq·"·"nvme_start_ctrl·failed·because·there·are·non-admin·submission·queues"·"\n",

5474

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_sq·"·"nvme_start_ctrl·failed·because·there·are·non-admin·submission·queues"·"\n",

5475

·····················qemu_get_thread_id(),

5475

·····················qemu_get_thread_id(),

5476

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5476

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5477

·····················);

5477

·····················);

5478

#line·5480·"trace/trace-hw_nvme.h"

5478

#line·5480·"trace/trace-hw_nvme.h"

5479

········}·else·{

5479

········}·else·{

5481

············qemu_log("pci_nvme_err_startfail_sq·"·"nvme_start_ctrl·failed·because·there·are·non-admin·submission·queues"·"\n");

5481

············qemu_log("pci_nvme_err_startfail_sq·"·"nvme_start_ctrl·failed·because·there·are·non-admin·submission·queues"·"\n");

5482

#line·5484·"trace/trace-hw_nvme.h"

5482

#line·5484·"trace/trace-hw_nvme.h"

5483

········}

5483

········}

5484

····}

5484

····}

5485

}

5485

}

5486

static·inline·void·trace_pci_nvme_err_startfail_sq(void)

5486

static·inline·void·trace_pci_nvme_err_startfail_sq(void)

5498

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_asq_misaligned(uint64_t·addr)

5498

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_asq_misaligned(uint64_t·addr)

5499

{

5499

{

5500

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_ASQ_MISALIGNED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5500

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_ASQ_MISALIGNED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5501

········if·(message_with_timestamp)·{

5501

········if·(message_with_timestamp)·{

5502

············struct·timeval·_now;

5502

············struct·timeval·_now;

5503

············gettimeofday(&_now,·NULL);

5503

············gettimeofday(&_now,·NULL);

5505

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_asq_misaligned·"·"nvme_start_ctrl·failed·because·the·admin·submission·queue·address·is·misaligned:·0x%"PRIx64""·"\n",

5505

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_asq_misaligned·"·"nvme_start_ctrl·failed·because·the·admin·submission·queue·address·is·misaligned:·0x%"PRIx64""·"\n",

5506

·····················qemu_get_thread_id(),

5506

·····················qemu_get_thread_id(),

5507

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5507

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5508

·····················,·addr);

5508

·····················,·addr);

5509

#line·5511·"trace/trace-hw_nvme.h"

5509

#line·5511·"trace/trace-hw_nvme.h"

5510

········}·else·{

5510

········}·else·{

5512

············qemu_log("pci_nvme_err_startfail_asq_misaligned·"·"nvme_start_ctrl·failed·because·the·admin·submission·queue·address·is·misaligned:·0x%"PRIx64""·"\n",·addr);

5512

············qemu_log("pci_nvme_err_startfail_asq_misaligned·"·"nvme_start_ctrl·failed·because·the·admin·submission·queue·address·is·misaligned:·0x%"PRIx64""·"\n",·addr);

5513

#line·5515·"trace/trace-hw_nvme.h"

5513

#line·5515·"trace/trace-hw_nvme.h"

5514

········}

5514

········}

5515

····}

5515

····}

5516

}

5516

}

5517

static·inline·void·trace_pci_nvme_err_startfail_asq_misaligned(uint64_t·addr)

5517

static·inline·void·trace_pci_nvme_err_startfail_asq_misaligned(uint64_t·addr)

5529

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_acq_misaligned(uint64_t·addr)

5529

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_acq_misaligned(uint64_t·addr)

5530

{

5530

{

5531

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_ACQ_MISALIGNED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5531

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_ACQ_MISALIGNED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5532

········if·(message_with_timestamp)·{

5532

········if·(message_with_timestamp)·{

5533

············struct·timeval·_now;

5533

············struct·timeval·_now;

5534

············gettimeofday(&_now,·NULL);

5534

············gettimeofday(&_now,·NULL);

5536

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_acq_misaligned·"·"nvme_start_ctrl·failed·because·the·admin·completion·queue·address·is·misaligned:·0x%"PRIx64""·"\n",

5536

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_acq_misaligned·"·"nvme_start_ctrl·failed·because·the·admin·completion·queue·address·is·misaligned:·0x%"PRIx64""·"\n",

5537

·····················qemu_get_thread_id(),

5537

·····················qemu_get_thread_id(),

5538

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5538

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5539

·····················,·addr);

5539

·····················,·addr);

5540

#line·5542·"trace/trace-hw_nvme.h"

5540

#line·5542·"trace/trace-hw_nvme.h"

5541

········}·else·{

5541

········}·else·{

5543

············qemu_log("pci_nvme_err_startfail_acq_misaligned·"·"nvme_start_ctrl·failed·because·the·admin·completion·queue·address·is·misaligned:·0x%"PRIx64""·"\n",·addr);

5543

············qemu_log("pci_nvme_err_startfail_acq_misaligned·"·"nvme_start_ctrl·failed·because·the·admin·completion·queue·address·is·misaligned:·0x%"PRIx64""·"\n",·addr);

5544

#line·5546·"trace/trace-hw_nvme.h"

5544

#line·5546·"trace/trace-hw_nvme.h"

5545

········}

5545

········}

5546

····}

5546

····}

5547

}

5547

}

5548

static·inline·void·trace_pci_nvme_err_startfail_acq_misaligned(uint64_t·addr)

5548

static·inline·void·trace_pci_nvme_err_startfail_acq_misaligned(uint64_t·addr)

5560

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_page_too_small(uint8_t·log2ps,·uint8_t·maxlog2ps)

5560

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_page_too_small(uint8_t·log2ps,·uint8_t·maxlog2ps)

5561

{

5561

{

5562

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_PAGE_TOO_SMALL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5562

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_PAGE_TOO_SMALL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5563

········if·(message_with_timestamp)·{

5563

········if·(message_with_timestamp)·{

5564

············struct·timeval·_now;

5564

············struct·timeval·_now;

5565

············gettimeofday(&_now,·NULL);

5565

············gettimeofday(&_now,·NULL);

5567

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_page_too_small·"·"nvme_start_ctrl·failed·because·the·page·size·is·too·small:·log2size=%u,·min=%u"·"\n",

5567

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_page_too_small·"·"nvme_start_ctrl·failed·because·the·page·size·is·too·small:·log2size=%u,·min=%u"·"\n",

5568

·····················qemu_get_thread_id(),

5568

·····················qemu_get_thread_id(),

5569

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5569

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5570

·····················,·log2ps,·maxlog2ps);

5570

·····················,·log2ps,·maxlog2ps);

5571

#line·5573·"trace/trace-hw_nvme.h"

5571

#line·5573·"trace/trace-hw_nvme.h"

5572

········}·else·{

5572

········}·else·{

5574

············qemu_log("pci_nvme_err_startfail_page_too_small·"·"nvme_start_ctrl·failed·because·the·page·size·is·too·small:·log2size=%u,·min=%u"·"\n",·log2ps,·maxlog2ps);

5574

············qemu_log("pci_nvme_err_startfail_page_too_small·"·"nvme_start_ctrl·failed·because·the·page·size·is·too·small:·log2size=%u,·min=%u"·"\n",·log2ps,·maxlog2ps);

5575

#line·5577·"trace/trace-hw_nvme.h"

5575

#line·5577·"trace/trace-hw_nvme.h"

5576

········}

5576

········}

5577

····}

5577

····}

5578

}

5578

}

5579

static·inline·void·trace_pci_nvme_err_startfail_page_too_small(uint8_t·log2ps,·uint8_t·maxlog2ps)

5579

static·inline·void·trace_pci_nvme_err_startfail_page_too_small(uint8_t·log2ps,·uint8_t·maxlog2ps)

5591

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_page_too_large(uint8_t·log2ps,·uint8_t·maxlog2ps)

5591

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_page_too_large(uint8_t·log2ps,·uint8_t·maxlog2ps)

5592

{

5592

{

5593

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_PAGE_TOO_LARGE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5593

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_PAGE_TOO_LARGE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5594

········if·(message_with_timestamp)·{

5594

········if·(message_with_timestamp)·{

5595

············struct·timeval·_now;

5595

············struct·timeval·_now;

5596

············gettimeofday(&_now,·NULL);

5596

············gettimeofday(&_now,·NULL);

5598

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_page_too_large·"·"nvme_start_ctrl·failed·because·the·page·size·is·too·large:·log2size=%u,·max=%u"·"\n",

5598

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_page_too_large·"·"nvme_start_ctrl·failed·because·the·page·size·is·too·large:·log2size=%u,·max=%u"·"\n",

5599

·····················qemu_get_thread_id(),

5599

·····················qemu_get_thread_id(),

5600

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5600

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5601

·····················,·log2ps,·maxlog2ps);

5601

·····················,·log2ps,·maxlog2ps);

5602

#line·5604·"trace/trace-hw_nvme.h"

5602

#line·5604·"trace/trace-hw_nvme.h"

5603

········}·else·{

5603

········}·else·{

5605

············qemu_log("pci_nvme_err_startfail_page_too_large·"·"nvme_start_ctrl·failed·because·the·page·size·is·too·large:·log2size=%u,·max=%u"·"\n",·log2ps,·maxlog2ps);

5605

············qemu_log("pci_nvme_err_startfail_page_too_large·"·"nvme_start_ctrl·failed·because·the·page·size·is·too·large:·log2size=%u,·max=%u"·"\n",·log2ps,·maxlog2ps);

5606

#line·5608·"trace/trace-hw_nvme.h"

5606

#line·5608·"trace/trace-hw_nvme.h"

5607

········}

5607

········}

5608

····}

5608

····}

5609

}

5609

}

5610

static·inline·void·trace_pci_nvme_err_startfail_page_too_large(uint8_t·log2ps,·uint8_t·maxlog2ps)

5610

static·inline·void·trace_pci_nvme_err_startfail_page_too_large(uint8_t·log2ps,·uint8_t·maxlog2ps)

5622

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_cqent_too_small(uint8_t·log2ps,·uint8_t·maxlog2ps)

5622

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_cqent_too_small(uint8_t·log2ps,·uint8_t·maxlog2ps)

5623

{

5623

{

5624

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_CQENT_TOO_SMALL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5624

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_CQENT_TOO_SMALL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5625

········if·(message_with_timestamp)·{

5625

········if·(message_with_timestamp)·{

5626

············struct·timeval·_now;

5626

············struct·timeval·_now;

5627

············gettimeofday(&_now,·NULL);

5627

············gettimeofday(&_now,·NULL);

5629

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_cqent_too_small·"·"nvme_start_ctrl·failed·because·the·completion·queue·entry·size·is·too·small:·log2size=%u,·min=%u"·"\n",

5629

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_cqent_too_small·"·"nvme_start_ctrl·failed·because·the·completion·queue·entry·size·is·too·small:·log2size=%u,·min=%u"·"\n",

5630

·····················qemu_get_thread_id(),

5630

·····················qemu_get_thread_id(),

5631

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5631

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5632

·····················,·log2ps,·maxlog2ps);

5632

·····················,·log2ps,·maxlog2ps);

5633

#line·5635·"trace/trace-hw_nvme.h"

5633

#line·5635·"trace/trace-hw_nvme.h"

5634

········}·else·{

5634

········}·else·{

5636

············qemu_log("pci_nvme_err_startfail_cqent_too_small·"·"nvme_start_ctrl·failed·because·the·completion·queue·entry·size·is·too·small:·log2size=%u,·min=%u"·"\n",·log2ps,·maxlog2ps);

5636

············qemu_log("pci_nvme_err_startfail_cqent_too_small·"·"nvme_start_ctrl·failed·because·the·completion·queue·entry·size·is·too·small:·log2size=%u,·min=%u"·"\n",·log2ps,·maxlog2ps);

5637

#line·5639·"trace/trace-hw_nvme.h"

5637

#line·5639·"trace/trace-hw_nvme.h"

5638

········}

5638

········}

5639

····}

5639

····}

5640

}

5640

}

5641

static·inline·void·trace_pci_nvme_err_startfail_cqent_too_small(uint8_t·log2ps,·uint8_t·maxlog2ps)

5641

static·inline·void·trace_pci_nvme_err_startfail_cqent_too_small(uint8_t·log2ps,·uint8_t·maxlog2ps)

5653

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_cqent_too_large(uint8_t·log2ps,·uint8_t·maxlog2ps)

5653

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_cqent_too_large(uint8_t·log2ps,·uint8_t·maxlog2ps)

5654

{

5654

{

5655

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_CQENT_TOO_LARGE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5655

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_CQENT_TOO_LARGE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5656

········if·(message_with_timestamp)·{

5656

········if·(message_with_timestamp)·{

5657

············struct·timeval·_now;

5657

············struct·timeval·_now;

5658

············gettimeofday(&_now,·NULL);

5658

············gettimeofday(&_now,·NULL);

5660

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_cqent_too_large·"·"nvme_start_ctrl·failed·because·the·completion·queue·entry·size·is·too·large:·log2size=%u,·max=%u"·"\n",

5660

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_cqent_too_large·"·"nvme_start_ctrl·failed·because·the·completion·queue·entry·size·is·too·large:·log2size=%u,·max=%u"·"\n",

5661

·····················qemu_get_thread_id(),

5661

·····················qemu_get_thread_id(),

5662

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5662

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5663

·····················,·log2ps,·maxlog2ps);

5663

·····················,·log2ps,·maxlog2ps);

5664

#line·5666·"trace/trace-hw_nvme.h"

5664

#line·5666·"trace/trace-hw_nvme.h"

5665

········}·else·{

5665

········}·else·{

5667

············qemu_log("pci_nvme_err_startfail_cqent_too_large·"·"nvme_start_ctrl·failed·because·the·completion·queue·entry·size·is·too·large:·log2size=%u,·max=%u"·"\n",·log2ps,·maxlog2ps);

5667

············qemu_log("pci_nvme_err_startfail_cqent_too_large·"·"nvme_start_ctrl·failed·because·the·completion·queue·entry·size·is·too·large:·log2size=%u,·max=%u"·"\n",·log2ps,·maxlog2ps);

5668

#line·5670·"trace/trace-hw_nvme.h"

5668

#line·5670·"trace/trace-hw_nvme.h"

5669

········}

5669

········}

5670

····}

5670

····}

5671

}

5671

}

5672

static·inline·void·trace_pci_nvme_err_startfail_cqent_too_large(uint8_t·log2ps,·uint8_t·maxlog2ps)

5672

static·inline·void·trace_pci_nvme_err_startfail_cqent_too_large(uint8_t·log2ps,·uint8_t·maxlog2ps)

5684

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_sqent_too_small(uint8_t·log2ps,·uint8_t·maxlog2ps)

5684

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_sqent_too_small(uint8_t·log2ps,·uint8_t·maxlog2ps)

5685

{

5685

{

5686

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_SQENT_TOO_SMALL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5686

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_SQENT_TOO_SMALL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5687

········if·(message_with_timestamp)·{

5687

········if·(message_with_timestamp)·{

5688

············struct·timeval·_now;

5688

············struct·timeval·_now;

5689

············gettimeofday(&_now,·NULL);

5689

············gettimeofday(&_now,·NULL);

5691

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_sqent_too_small·"·"nvme_start_ctrl·failed·because·the·submission·queue·entry·size·is·too·small:·log2size=%u,·min=%u"·"\n",

5691

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_sqent_too_small·"·"nvme_start_ctrl·failed·because·the·submission·queue·entry·size·is·too·small:·log2size=%u,·min=%u"·"\n",

5692

·····················qemu_get_thread_id(),

5692

·····················qemu_get_thread_id(),

5693

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5693

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5694

·····················,·log2ps,·maxlog2ps);

5694

·····················,·log2ps,·maxlog2ps);

5695

#line·5697·"trace/trace-hw_nvme.h"

5695

#line·5697·"trace/trace-hw_nvme.h"

5696

········}·else·{

5696

········}·else·{

5698

············qemu_log("pci_nvme_err_startfail_sqent_too_small·"·"nvme_start_ctrl·failed·because·the·submission·queue·entry·size·is·too·small:·log2size=%u,·min=%u"·"\n",·log2ps,·maxlog2ps);

5698

············qemu_log("pci_nvme_err_startfail_sqent_too_small·"·"nvme_start_ctrl·failed·because·the·submission·queue·entry·size·is·too·small:·log2size=%u,·min=%u"·"\n",·log2ps,·maxlog2ps);

5699

#line·5701·"trace/trace-hw_nvme.h"

5699

#line·5701·"trace/trace-hw_nvme.h"

5700

········}

5700

········}

5701

····}

5701

····}

5702

}

5702

}

5703

static·inline·void·trace_pci_nvme_err_startfail_sqent_too_small(uint8_t·log2ps,·uint8_t·maxlog2ps)

5703

static·inline·void·trace_pci_nvme_err_startfail_sqent_too_small(uint8_t·log2ps,·uint8_t·maxlog2ps)

5715

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_sqent_too_large(uint8_t·log2ps,·uint8_t·maxlog2ps)

5715

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_sqent_too_large(uint8_t·log2ps,·uint8_t·maxlog2ps)

5716

{

5716

{

5717

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_SQENT_TOO_LARGE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5717

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_SQENT_TOO_LARGE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5718

········if·(message_with_timestamp)·{

5718

········if·(message_with_timestamp)·{

5719

············struct·timeval·_now;

5719

············struct·timeval·_now;

5720

············gettimeofday(&_now,·NULL);

5720

············gettimeofday(&_now,·NULL);

5722

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_sqent_too_large·"·"nvme_start_ctrl·failed·because·the·submission·queue·entry·size·is·too·large:·log2size=%u,·max=%u"·"\n",

5722

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_sqent_too_large·"·"nvme_start_ctrl·failed·because·the·submission·queue·entry·size·is·too·large:·log2size=%u,·max=%u"·"\n",

5723

·····················qemu_get_thread_id(),

5723

·····················qemu_get_thread_id(),

5724

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5724

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5725

·····················,·log2ps,·maxlog2ps);

5725

·····················,·log2ps,·maxlog2ps);

5726

#line·5728·"trace/trace-hw_nvme.h"

5726

#line·5728·"trace/trace-hw_nvme.h"

5727

········}·else·{

5727

········}·else·{

5729

············qemu_log("pci_nvme_err_startfail_sqent_too_large·"·"nvme_start_ctrl·failed·because·the·submission·queue·entry·size·is·too·large:·log2size=%u,·max=%u"·"\n",·log2ps,·maxlog2ps);

5729

············qemu_log("pci_nvme_err_startfail_sqent_too_large·"·"nvme_start_ctrl·failed·because·the·submission·queue·entry·size·is·too·large:·log2size=%u,·max=%u"·"\n",·log2ps,·maxlog2ps);

5730

#line·5732·"trace/trace-hw_nvme.h"

5730

#line·5732·"trace/trace-hw_nvme.h"

5731

········}

5731

········}

5732

····}

5732

····}

5733

}

5733

}

5734

static·inline·void·trace_pci_nvme_err_startfail_sqent_too_large(uint8_t·log2ps,·uint8_t·maxlog2ps)

5734

static·inline·void·trace_pci_nvme_err_startfail_sqent_too_large(uint8_t·log2ps,·uint8_t·maxlog2ps)

5746

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_css(uint8_t·css)

5746

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_css(uint8_t·css)

5747

{

5747

{

5748

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_CSS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5748

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_CSS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5749

········if·(message_with_timestamp)·{

5749

········if·(message_with_timestamp)·{

5750

············struct·timeval·_now;

5750

············struct·timeval·_now;

5751

············gettimeofday(&_now,·NULL);

5751

············gettimeofday(&_now,·NULL);

5753

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_css·"·"nvme_start_ctrl·failed·because·invalid·command·set·selected:%u"·"\n",

5753

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_css·"·"nvme_start_ctrl·failed·because·invalid·command·set·selected:%u"·"\n",

5754

·····················qemu_get_thread_id(),

5754

·····················qemu_get_thread_id(),

5755

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5755

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5756

·····················,·css);

5756

·····················,·css);

5757

#line·5759·"trace/trace-hw_nvme.h"

5757

#line·5759·"trace/trace-hw_nvme.h"

5758

········}·else·{

5758

········}·else·{

5760

············qemu_log("pci_nvme_err_startfail_css·"·"nvme_start_ctrl·failed·because·invalid·command·set·selected:%u"·"\n",·css);

5760

············qemu_log("pci_nvme_err_startfail_css·"·"nvme_start_ctrl·failed·because·invalid·command·set·selected:%u"·"\n",·css);

5761

#line·5763·"trace/trace-hw_nvme.h"

5761

#line·5763·"trace/trace-hw_nvme.h"

5762

········}

5762

········}

5763

····}

5763

····}

5764

}

5764

}

5765

static·inline·void·trace_pci_nvme_err_startfail_css(uint8_t·css)

5765

static·inline·void·trace_pci_nvme_err_startfail_css(uint8_t·css)

5777

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_asqent_sz_zero(void)

5777

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_asqent_sz_zero(void)

5778

{

5778

{

5779

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_ASQENT_SZ_ZERO)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5779

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_ASQENT_SZ_ZERO)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5780

········if·(message_with_timestamp)·{

5780

········if·(message_with_timestamp)·{

5781

············struct·timeval·_now;

5781

············struct·timeval·_now;

5782

············gettimeofday(&_now,·NULL);

5782

············gettimeofday(&_now,·NULL);

5784

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_asqent_sz_zero·"·"nvme_start_ctrl·failed·because·the·admin·submission·queue·size·is·zero"·"\n",

5784

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_asqent_sz_zero·"·"nvme_start_ctrl·failed·because·the·admin·submission·queue·size·is·zero"·"\n",

5785

·····················qemu_get_thread_id(),

5785

·····················qemu_get_thread_id(),

5786

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5786

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5787

·····················);

5787

·····················);

5788

#line·5790·"trace/trace-hw_nvme.h"

5788

#line·5790·"trace/trace-hw_nvme.h"

5789

········}·else·{

5789

········}·else·{

5791

············qemu_log("pci_nvme_err_startfail_asqent_sz_zero·"·"nvme_start_ctrl·failed·because·the·admin·submission·queue·size·is·zero"·"\n");

5791

············qemu_log("pci_nvme_err_startfail_asqent_sz_zero·"·"nvme_start_ctrl·failed·because·the·admin·submission·queue·size·is·zero"·"\n");

5792

#line·5794·"trace/trace-hw_nvme.h"

5792

#line·5794·"trace/trace-hw_nvme.h"

5793

········}

5793

········}

5794

····}

5794

····}

5795

}

5795

}

5796

static·inline·void·trace_pci_nvme_err_startfail_asqent_sz_zero(void)

5796

static·inline·void·trace_pci_nvme_err_startfail_asqent_sz_zero(void)

5808

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_acqent_sz_zero(void)

5808

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_acqent_sz_zero(void)

5809

{

5809

{

5810

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_ACQENT_SZ_ZERO)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5810

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_ACQENT_SZ_ZERO)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5811

········if·(message_with_timestamp)·{

5811

········if·(message_with_timestamp)·{

5812

············struct·timeval·_now;

5812

············struct·timeval·_now;

5813

············gettimeofday(&_now,·NULL);

5813

············gettimeofday(&_now,·NULL);

5815

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_acqent_sz_zero·"·"nvme_start_ctrl·failed·because·the·admin·completion·queue·size·is·zero"·"\n",

5815

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_acqent_sz_zero·"·"nvme_start_ctrl·failed·because·the·admin·completion·queue·size·is·zero"·"\n",

5816

·····················qemu_get_thread_id(),

5816

·····················qemu_get_thread_id(),

5817

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5817

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5818

·····················);

5818

·····················);

5819

#line·5821·"trace/trace-hw_nvme.h"

5819

#line·5821·"trace/trace-hw_nvme.h"

5820

········}·else·{

5820

········}·else·{

5822

············qemu_log("pci_nvme_err_startfail_acqent_sz_zero·"·"nvme_start_ctrl·failed·because·the·admin·completion·queue·size·is·zero"·"\n");

5822

············qemu_log("pci_nvme_err_startfail_acqent_sz_zero·"·"nvme_start_ctrl·failed·because·the·admin·completion·queue·size·is·zero"·"\n");

5823

#line·5825·"trace/trace-hw_nvme.h"

5823

#line·5825·"trace/trace-hw_nvme.h"

5824

········}

5824

········}

5825

····}

5825

····}

5826

}

5826

}

5827

static·inline·void·trace_pci_nvme_err_startfail_acqent_sz_zero(void)

5827

static·inline·void·trace_pci_nvme_err_startfail_acqent_sz_zero(void)

5839

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_zasl_too_small(uint32_t·zasl,·uint32_t·pagesz)

5839

static·inline·void·_nocheck__trace_pci_nvme_err_startfail_zasl_too_small(uint32_t·zasl,·uint32_t·pagesz)

5840

{

5840

{

5841

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_ZASL_TOO_SMALL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5841

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL_ZASL_TOO_SMALL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5842

········if·(message_with_timestamp)·{

5842

········if·(message_with_timestamp)·{

5843

············struct·timeval·_now;

5843

············struct·timeval·_now;

5844

············gettimeofday(&_now,·NULL);

5844

············gettimeofday(&_now,·NULL);

5846

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_zasl_too_small·"·"nvme_start_ctrl·failed·because·zone·append·size·limit·%"PRIu32"·is·too·small,·needs·to·be·>=·%"PRIu32""·"\n",

5846

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail_zasl_too_small·"·"nvme_start_ctrl·failed·because·zone·append·size·limit·%"PRIu32"·is·too·small,·needs·to·be·>=·%"PRIu32""·"\n",

5847

·····················qemu_get_thread_id(),

5847

·····················qemu_get_thread_id(),

5848

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5848

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5849

·····················,·zasl,·pagesz);

5849

·····················,·zasl,·pagesz);

5850

#line·5852·"trace/trace-hw_nvme.h"

5850

#line·5852·"trace/trace-hw_nvme.h"

5851

········}·else·{

5851

········}·else·{

5853

············qemu_log("pci_nvme_err_startfail_zasl_too_small·"·"nvme_start_ctrl·failed·because·zone·append·size·limit·%"PRIu32"·is·too·small,·needs·to·be·>=·%"PRIu32""·"\n",·zasl,·pagesz);

5853

············qemu_log("pci_nvme_err_startfail_zasl_too_small·"·"nvme_start_ctrl·failed·because·zone·append·size·limit·%"PRIu32"·is·too·small,·needs·to·be·>=·%"PRIu32""·"\n",·zasl,·pagesz);

5854

#line·5856·"trace/trace-hw_nvme.h"

5854

#line·5856·"trace/trace-hw_nvme.h"

5855

········}

5855

········}

5856

····}

5856

····}

5857

}

5857

}

5858

static·inline·void·trace_pci_nvme_err_startfail_zasl_too_small(uint32_t·zasl,·uint32_t·pagesz)

5858

static·inline·void·trace_pci_nvme_err_startfail_zasl_too_small(uint32_t·zasl,·uint32_t·pagesz)

5870

static·inline·void·_nocheck__trace_pci_nvme_err_startfail(void)

5870

static·inline·void·_nocheck__trace_pci_nvme_err_startfail(void)

5871

{

5871

{

5872

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5872

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_STARTFAIL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5873

········if·(message_with_timestamp)·{

5873

········if·(message_with_timestamp)·{

5874

············struct·timeval·_now;

5874

············struct·timeval·_now;

5875

············gettimeofday(&_now,·NULL);

5875

············gettimeofday(&_now,·NULL);

5877

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail·"·"setting·controller·enable·bit·failed"·"\n",

5877

············qemu_log("%d@%zu.%06zu:pci_nvme_err_startfail·"·"setting·controller·enable·bit·failed"·"\n",

5878

·····················qemu_get_thread_id(),

5878

·····················qemu_get_thread_id(),

5879

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5879

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5880

·····················);

5880

·····················);

5881

#line·5883·"trace/trace-hw_nvme.h"

5881

#line·5883·"trace/trace-hw_nvme.h"

5882

········}·else·{

5882

········}·else·{

5884

············qemu_log("pci_nvme_err_startfail·"·"setting·controller·enable·bit·failed"·"\n");

5884

············qemu_log("pci_nvme_err_startfail·"·"setting·controller·enable·bit·failed"·"\n");

5885

#line·5887·"trace/trace-hw_nvme.h"

5885

#line·5887·"trace/trace-hw_nvme.h"

5886

········}

5886

········}

5887

····}

5887

····}

5888

}

5888

}

5889

static·inline·void·trace_pci_nvme_err_startfail(void)

5889

static·inline·void·trace_pci_nvme_err_startfail(void)

5901

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_mgmt_action(uint8_t·action)

5901

static·inline·void·_nocheck__trace_pci_nvme_err_invalid_mgmt_action(uint8_t·action)

5902

{

5902

{

5903

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_MGMT_ACTION)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5903

····if·(trace_event_get_state(TRACE_PCI_NVME_ERR_INVALID_MGMT_ACTION)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5904

········if·(message_with_timestamp)·{

5904

········if·(message_with_timestamp)·{

5905

············struct·timeval·_now;

5905

············struct·timeval·_now;

5906

············gettimeofday(&_now,·NULL);

5906

············gettimeofday(&_now,·NULL);

5908

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_mgmt_action·"·"action=0x%"PRIx8""·"\n",

5908

············qemu_log("%d@%zu.%06zu:pci_nvme_err_invalid_mgmt_action·"·"action=0x%"PRIx8""·"\n",

5909

·····················qemu_get_thread_id(),

5909

·····················qemu_get_thread_id(),

5910

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5910

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5911

·····················,·action);

5911

·····················,·action);

5912

#line·5914·"trace/trace-hw_nvme.h"

5912

#line·5914·"trace/trace-hw_nvme.h"

5913

········}·else·{

5913

········}·else·{

5915

············qemu_log("pci_nvme_err_invalid_mgmt_action·"·"action=0x%"PRIx8""·"\n",·action);

5915

············qemu_log("pci_nvme_err_invalid_mgmt_action·"·"action=0x%"PRIx8""·"\n",·action);

5916

#line·5918·"trace/trace-hw_nvme.h"

5916

#line·5918·"trace/trace-hw_nvme.h"

5917

········}

5917

········}

5918

····}

5918

····}

5919

}

5919

}

5920

static·inline·void·trace_pci_nvme_err_invalid_mgmt_action(uint8_t·action)

5920

static·inline·void·trace_pci_nvme_err_invalid_mgmt_action(uint8_t·action)

5932

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_misaligned32(uint64_t·offset)

5932

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_misaligned32(uint64_t·offset)

5933

{

5933

{

5934

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_MISALIGNED32)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5934

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_MISALIGNED32)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5935

········if·(message_with_timestamp)·{

5935

········if·(message_with_timestamp)·{

5936

············struct·timeval·_now;

5936

············struct·timeval·_now;

5937

············gettimeofday(&_now,·NULL);

5937

············gettimeofday(&_now,·NULL);

5939

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_misaligned32·"·"MMIO·write·not·32-bit·aligned,·offset=0x%"PRIx64""·"\n",

5939

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_misaligned32·"·"MMIO·write·not·32-bit·aligned,·offset=0x%"PRIx64""·"\n",

5940

·····················qemu_get_thread_id(),

5940

·····················qemu_get_thread_id(),

5941

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5941

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5942

·····················,·offset);

5942

·····················,·offset);

5943

#line·5945·"trace/trace-hw_nvme.h"

5943

#line·5945·"trace/trace-hw_nvme.h"

5944

········}·else·{

5944

········}·else·{

5946

············qemu_log("pci_nvme_ub_mmiowr_misaligned32·"·"MMIO·write·not·32-bit·aligned,·offset=0x%"PRIx64""·"\n",·offset);

5946

············qemu_log("pci_nvme_ub_mmiowr_misaligned32·"·"MMIO·write·not·32-bit·aligned,·offset=0x%"PRIx64""·"\n",·offset);

5947

#line·5949·"trace/trace-hw_nvme.h"

5947

#line·5949·"trace/trace-hw_nvme.h"

5948

········}

5948

········}

5949

····}

5949

····}

5950

}

5950

}

5951

static·inline·void·trace_pci_nvme_ub_mmiowr_misaligned32(uint64_t·offset)

5951

static·inline·void·trace_pci_nvme_ub_mmiowr_misaligned32(uint64_t·offset)

5963

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_toosmall(uint64_t·offset,·unsigned·size)

5963

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_toosmall(uint64_t·offset,·unsigned·size)

5964

{

5964

{

5965

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_TOOSMALL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5965

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_TOOSMALL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5966

········if·(message_with_timestamp)·{

5966

········if·(message_with_timestamp)·{

5967

············struct·timeval·_now;

5967

············struct·timeval·_now;

5968

············gettimeofday(&_now,·NULL);

5968

············gettimeofday(&_now,·NULL);

5970

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_toosmall·"·"MMIO·write·smaller·than·32·bits,·offset=0x%"PRIx64",·size=%u"·"\n",

5970

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_toosmall·"·"MMIO·write·smaller·than·32·bits,·offset=0x%"PRIx64",·size=%u"·"\n",

5971

·····················qemu_get_thread_id(),

5971

·····················qemu_get_thread_id(),

5972

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5972

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

5973

·····················,·offset,·size);

5973

·····················,·offset,·size);

5974

#line·5976·"trace/trace-hw_nvme.h"

5974

#line·5976·"trace/trace-hw_nvme.h"

5975

········}·else·{

5975

········}·else·{

5977

············qemu_log("pci_nvme_ub_mmiowr_toosmall·"·"MMIO·write·smaller·than·32·bits,·offset=0x%"PRIx64",·size=%u"·"\n",·offset,·size);

5977

············qemu_log("pci_nvme_ub_mmiowr_toosmall·"·"MMIO·write·smaller·than·32·bits,·offset=0x%"PRIx64",·size=%u"·"\n",·offset,·size);

5978

#line·5980·"trace/trace-hw_nvme.h"

5978

#line·5980·"trace/trace-hw_nvme.h"

5979

········}

5979

········}

5980

····}

5980

····}

5981

}

5981

}

5982

static·inline·void·trace_pci_nvme_ub_mmiowr_toosmall(uint64_t·offset,·unsigned·size)

5982

static·inline·void·trace_pci_nvme_ub_mmiowr_toosmall(uint64_t·offset,·unsigned·size)

5994

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_intmask_with_msix(void)

5994

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_intmask_with_msix(void)

5995

{

5995

{

5996

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_INTMASK_WITH_MSIX)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5996

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_INTMASK_WITH_MSIX)·&&·qemu_loglevel_mask(LOG_TRACE))·{

5997

········if·(message_with_timestamp)·{

5997

········if·(message_with_timestamp)·{

5998

············struct·timeval·_now;

5998

············struct·timeval·_now;

5999

············gettimeofday(&_now,·NULL);

5999

············gettimeofday(&_now,·NULL);

6001

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_intmask_with_msix·"·"undefined·access·to·interrupt·mask·set·when·MSI-X·is·enabled"·"\n",

6001

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_intmask_with_msix·"·"undefined·access·to·interrupt·mask·set·when·MSI-X·is·enabled"·"\n",

6002

·····················qemu_get_thread_id(),

6002

·····················qemu_get_thread_id(),

6003

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6003

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6004

·····················);

6004

·····················);

6005

#line·6007·"trace/trace-hw_nvme.h"

6005

#line·6007·"trace/trace-hw_nvme.h"

6006

········}·else·{

6006

········}·else·{

6008

············qemu_log("pci_nvme_ub_mmiowr_intmask_with_msix·"·"undefined·access·to·interrupt·mask·set·when·MSI-X·is·enabled"·"\n");

6008

············qemu_log("pci_nvme_ub_mmiowr_intmask_with_msix·"·"undefined·access·to·interrupt·mask·set·when·MSI-X·is·enabled"·"\n");

6009

#line·6011·"trace/trace-hw_nvme.h"

6009

#line·6011·"trace/trace-hw_nvme.h"

6010

········}

6010

········}

6011

····}

6011

····}

6012

}

6012

}

6013

static·inline·void·trace_pci_nvme_ub_mmiowr_intmask_with_msix(void)

6013

static·inline·void·trace_pci_nvme_ub_mmiowr_intmask_with_msix(void)

6025

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_ro_csts(void)

6025

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_ro_csts(void)

6026

{

6026

{

6027

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_RO_CSTS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6027

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_RO_CSTS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6028

········if·(message_with_timestamp)·{

6028

········if·(message_with_timestamp)·{

6029

············struct·timeval·_now;

6029

············struct·timeval·_now;

6030

············gettimeofday(&_now,·NULL);

6030

············gettimeofday(&_now,·NULL);

6032

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_ro_csts·"·"attempted·to·set·a·read·only·bit·of·controller·status"·"\n",

6032

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_ro_csts·"·"attempted·to·set·a·read·only·bit·of·controller·status"·"\n",

6033

·····················qemu_get_thread_id(),

6033

·····················qemu_get_thread_id(),

6034

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6034

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6035

·····················);

6035

·····················);

6036

#line·6038·"trace/trace-hw_nvme.h"

6036

#line·6038·"trace/trace-hw_nvme.h"

6037

········}·else·{

6037

········}·else·{

6039

············qemu_log("pci_nvme_ub_mmiowr_ro_csts·"·"attempted·to·set·a·read·only·bit·of·controller·status"·"\n");

6039

············qemu_log("pci_nvme_ub_mmiowr_ro_csts·"·"attempted·to·set·a·read·only·bit·of·controller·status"·"\n");

6040

#line·6042·"trace/trace-hw_nvme.h"

6040

#line·6042·"trace/trace-hw_nvme.h"

6041

········}

6041

········}

6042

····}

6042

····}

6043

}

6043

}

6044

static·inline·void·trace_pci_nvme_ub_mmiowr_ro_csts(void)

6044

static·inline·void·trace_pci_nvme_ub_mmiowr_ro_csts(void)

6056

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_ssreset_w1c_unsupported(void)

6056

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_ssreset_w1c_unsupported(void)

6057

{

6057

{

6058

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_SSRESET_W1C_UNSUPPORTED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6058

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_SSRESET_W1C_UNSUPPORTED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6059

········if·(message_with_timestamp)·{

6059

········if·(message_with_timestamp)·{

6060

············struct·timeval·_now;

6060

············struct·timeval·_now;

6061

············gettimeofday(&_now,·NULL);

6061

············gettimeofday(&_now,·NULL);

6063

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_ssreset_w1c_unsupported·"·"attempted·to·W1C·CSTS.NSSRO·but·CAP.NSSRS·is·zero·(not·supported)"·"\n",

6063

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_ssreset_w1c_unsupported·"·"attempted·to·W1C·CSTS.NSSRO·but·CAP.NSSRS·is·zero·(not·supported)"·"\n",

6064

·····················qemu_get_thread_id(),

6064

·····················qemu_get_thread_id(),

6065

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6065

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6066

·····················);

6066

·····················);

6067

#line·6069·"trace/trace-hw_nvme.h"

6067

#line·6069·"trace/trace-hw_nvme.h"

6068

········}·else·{

6068

········}·else·{

6070

············qemu_log("pci_nvme_ub_mmiowr_ssreset_w1c_unsupported·"·"attempted·to·W1C·CSTS.NSSRO·but·CAP.NSSRS·is·zero·(not·supported)"·"\n");

6070

············qemu_log("pci_nvme_ub_mmiowr_ssreset_w1c_unsupported·"·"attempted·to·W1C·CSTS.NSSRO·but·CAP.NSSRS·is·zero·(not·supported)"·"\n");

6071

#line·6073·"trace/trace-hw_nvme.h"

6071

#line·6073·"trace/trace-hw_nvme.h"

6072

········}

6072

········}

6073

····}

6073

····}

6074

}

6074

}

6075

static·inline·void·trace_pci_nvme_ub_mmiowr_ssreset_w1c_unsupported(void)

6075

static·inline·void·trace_pci_nvme_ub_mmiowr_ssreset_w1c_unsupported(void)

6087

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_ssreset_unsupported(void)

6087

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_ssreset_unsupported(void)

6088

{

6088

{

6089

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_SSRESET_UNSUPPORTED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6089

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_SSRESET_UNSUPPORTED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6090

········if·(message_with_timestamp)·{

6090

········if·(message_with_timestamp)·{

6091

············struct·timeval·_now;

6091

············struct·timeval·_now;

6092

············gettimeofday(&_now,·NULL);

6092

············gettimeofday(&_now,·NULL);

6094

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_ssreset_unsupported·"·"attempted·NVM·subsystem·reset·but·CAP.NSSRS·is·zero·(not·supported)"·"\n",

6094

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_ssreset_unsupported·"·"attempted·NVM·subsystem·reset·but·CAP.NSSRS·is·zero·(not·supported)"·"\n",

6095

·····················qemu_get_thread_id(),

6095

·····················qemu_get_thread_id(),

6096

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6096

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6097

·····················);

6097

·····················);

6098

#line·6100·"trace/trace-hw_nvme.h"

6098

#line·6100·"trace/trace-hw_nvme.h"

6099

········}·else·{

6099

········}·else·{

6101

············qemu_log("pci_nvme_ub_mmiowr_ssreset_unsupported·"·"attempted·NVM·subsystem·reset·but·CAP.NSSRS·is·zero·(not·supported)"·"\n");

6101

············qemu_log("pci_nvme_ub_mmiowr_ssreset_unsupported·"·"attempted·NVM·subsystem·reset·but·CAP.NSSRS·is·zero·(not·supported)"·"\n");

6102

#line·6104·"trace/trace-hw_nvme.h"

6102

#line·6104·"trace/trace-hw_nvme.h"

6103

········}

6103

········}

6104

····}

6104

····}

6105

}

6105

}

6106

static·inline·void·trace_pci_nvme_ub_mmiowr_ssreset_unsupported(void)

6106

static·inline·void·trace_pci_nvme_ub_mmiowr_ssreset_unsupported(void)

6118

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_cmbloc_reserved(void)

6118

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_cmbloc_reserved(void)

6119

{

6119

{

6120

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_CMBLOC_RESERVED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6120

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_CMBLOC_RESERVED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6121

········if·(message_with_timestamp)·{

6121

········if·(message_with_timestamp)·{

6122

············struct·timeval·_now;

6122

············struct·timeval·_now;

6123

············gettimeofday(&_now,·NULL);

6123

············gettimeofday(&_now,·NULL);

6125

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_cmbloc_reserved·"·"invalid·write·to·reserved·CMBLOC·when·CMBSZ·is·zero,·ignored"·"\n",

6125

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_cmbloc_reserved·"·"invalid·write·to·reserved·CMBLOC·when·CMBSZ·is·zero,·ignored"·"\n",

6126

·····················qemu_get_thread_id(),

6126

·····················qemu_get_thread_id(),

6127

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6127

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6128

·····················);

6128

·····················);

6129

#line·6131·"trace/trace-hw_nvme.h"

6129

#line·6131·"trace/trace-hw_nvme.h"

6130

········}·else·{

6130

········}·else·{

6132

············qemu_log("pci_nvme_ub_mmiowr_cmbloc_reserved·"·"invalid·write·to·reserved·CMBLOC·when·CMBSZ·is·zero,·ignored"·"\n");

6132

············qemu_log("pci_nvme_ub_mmiowr_cmbloc_reserved·"·"invalid·write·to·reserved·CMBLOC·when·CMBSZ·is·zero,·ignored"·"\n");

6133

#line·6135·"trace/trace-hw_nvme.h"

6133

#line·6135·"trace/trace-hw_nvme.h"

6134

········}

6134

········}

6135

····}

6135

····}

6136

}

6136

}

6137

static·inline·void·trace_pci_nvme_ub_mmiowr_cmbloc_reserved(void)

6137

static·inline·void·trace_pci_nvme_ub_mmiowr_cmbloc_reserved(void)

6149

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_cmbsz_readonly(void)

6149

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_cmbsz_readonly(void)

6150

{

6150

{

6151

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_CMBSZ_READONLY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6151

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_CMBSZ_READONLY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6152

········if·(message_with_timestamp)·{

6152

········if·(message_with_timestamp)·{

6153

············struct·timeval·_now;

6153

············struct·timeval·_now;

6154

············gettimeofday(&_now,·NULL);

6154

············gettimeofday(&_now,·NULL);

6156

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_cmbsz_readonly·"·"invalid·write·to·read·only·CMBSZ,·ignored"·"\n",

6156

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_cmbsz_readonly·"·"invalid·write·to·read·only·CMBSZ,·ignored"·"\n",

6157

·····················qemu_get_thread_id(),

6157

·····················qemu_get_thread_id(),

6158

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6158

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6159

·····················);

6159

·····················);

6160

#line·6162·"trace/trace-hw_nvme.h"

6160

#line·6162·"trace/trace-hw_nvme.h"

6161

········}·else·{

6161

········}·else·{

6163

············qemu_log("pci_nvme_ub_mmiowr_cmbsz_readonly·"·"invalid·write·to·read·only·CMBSZ,·ignored"·"\n");

6163

············qemu_log("pci_nvme_ub_mmiowr_cmbsz_readonly·"·"invalid·write·to·read·only·CMBSZ,·ignored"·"\n");

6164

#line·6166·"trace/trace-hw_nvme.h"

6164

#line·6166·"trace/trace-hw_nvme.h"

6165

········}

6165

········}

6166

····}

6166

····}

6167

}

6167

}

6168

static·inline·void·trace_pci_nvme_ub_mmiowr_cmbsz_readonly(void)

6168

static·inline·void·trace_pci_nvme_ub_mmiowr_cmbsz_readonly(void)

6180

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_pmrcap_readonly(void)

6180

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_pmrcap_readonly(void)

6181

{

6181

{

6182

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_PMRCAP_READONLY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6182

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_PMRCAP_READONLY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6183

········if·(message_with_timestamp)·{

6183

········if·(message_with_timestamp)·{

6184

············struct·timeval·_now;

6184

············struct·timeval·_now;

6185

············gettimeofday(&_now,·NULL);

6185

············gettimeofday(&_now,·NULL);

6187

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_pmrcap_readonly·"·"invalid·write·to·read·only·PMRCAP,·ignored"·"\n",

6187

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_pmrcap_readonly·"·"invalid·write·to·read·only·PMRCAP,·ignored"·"\n",

6188

·····················qemu_get_thread_id(),

6188

·····················qemu_get_thread_id(),

6189

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6189

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6190

·····················);

6190

·····················);

6191

#line·6193·"trace/trace-hw_nvme.h"

6191

#line·6193·"trace/trace-hw_nvme.h"

6192

········}·else·{

6192

········}·else·{

6194

············qemu_log("pci_nvme_ub_mmiowr_pmrcap_readonly·"·"invalid·write·to·read·only·PMRCAP,·ignored"·"\n");

6194

············qemu_log("pci_nvme_ub_mmiowr_pmrcap_readonly·"·"invalid·write·to·read·only·PMRCAP,·ignored"·"\n");

6195

#line·6197·"trace/trace-hw_nvme.h"

6195

#line·6197·"trace/trace-hw_nvme.h"

6196

········}

6196

········}

6197

····}

6197

····}

6198

}

6198

}

6199

static·inline·void·trace_pci_nvme_ub_mmiowr_pmrcap_readonly(void)

6199

static·inline·void·trace_pci_nvme_ub_mmiowr_pmrcap_readonly(void)

6211

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_pmrsts_readonly(void)

6211

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_pmrsts_readonly(void)

6212

{

6212

{

6213

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_PMRSTS_READONLY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6213

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_PMRSTS_READONLY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6214

········if·(message_with_timestamp)·{

6214

········if·(message_with_timestamp)·{

6215

············struct·timeval·_now;

6215

············struct·timeval·_now;

6216

············gettimeofday(&_now,·NULL);

6216

············gettimeofday(&_now,·NULL);

6218

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_pmrsts_readonly·"·"invalid·write·to·read·only·PMRSTS,·ignored"·"\n",

6218

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_pmrsts_readonly·"·"invalid·write·to·read·only·PMRSTS,·ignored"·"\n",

6219

·····················qemu_get_thread_id(),

6219

·····················qemu_get_thread_id(),

6220

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6220

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6221

·····················);

6221

·····················);

6222

#line·6224·"trace/trace-hw_nvme.h"

6222

#line·6224·"trace/trace-hw_nvme.h"

6223

········}·else·{

6223

········}·else·{

6225

············qemu_log("pci_nvme_ub_mmiowr_pmrsts_readonly·"·"invalid·write·to·read·only·PMRSTS,·ignored"·"\n");

6225

············qemu_log("pci_nvme_ub_mmiowr_pmrsts_readonly·"·"invalid·write·to·read·only·PMRSTS,·ignored"·"\n");

6226

#line·6228·"trace/trace-hw_nvme.h"

6226

#line·6228·"trace/trace-hw_nvme.h"

6227

········}

6227

········}

6228

····}

6228

····}

6229

}

6229

}

6230

static·inline·void·trace_pci_nvme_ub_mmiowr_pmrsts_readonly(void)

6230

static·inline·void·trace_pci_nvme_ub_mmiowr_pmrsts_readonly(void)

6242

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_pmrebs_readonly(void)

6242

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_pmrebs_readonly(void)

6243

{

6243

{

6244

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_PMREBS_READONLY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6244

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_PMREBS_READONLY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6245

········if·(message_with_timestamp)·{

6245

········if·(message_with_timestamp)·{

6246

············struct·timeval·_now;

6246

············struct·timeval·_now;

6247

············gettimeofday(&_now,·NULL);

6247

············gettimeofday(&_now,·NULL);

6249

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_pmrebs_readonly·"·"invalid·write·to·read·only·PMREBS,·ignored"·"\n",

6249

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_pmrebs_readonly·"·"invalid·write·to·read·only·PMREBS,·ignored"·"\n",

6250

·····················qemu_get_thread_id(),

6250

·····················qemu_get_thread_id(),

6251

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6251

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6252

·····················);

6252

·····················);

6253

#line·6255·"trace/trace-hw_nvme.h"

6253

#line·6255·"trace/trace-hw_nvme.h"

6254

········}·else·{

6254

········}·else·{

6256

············qemu_log("pci_nvme_ub_mmiowr_pmrebs_readonly·"·"invalid·write·to·read·only·PMREBS,·ignored"·"\n");

6256

············qemu_log("pci_nvme_ub_mmiowr_pmrebs_readonly·"·"invalid·write·to·read·only·PMREBS,·ignored"·"\n");

6257

#line·6259·"trace/trace-hw_nvme.h"

6257

#line·6259·"trace/trace-hw_nvme.h"

6258

········}

6258

········}

6259

····}

6259

····}

6260

}

6260

}

6261

static·inline·void·trace_pci_nvme_ub_mmiowr_pmrebs_readonly(void)

6261

static·inline·void·trace_pci_nvme_ub_mmiowr_pmrebs_readonly(void)

6273

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_pmrswtp_readonly(void)

6273

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_pmrswtp_readonly(void)

6274

{

6274

{

6275

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_PMRSWTP_READONLY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6275

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_PMRSWTP_READONLY)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6276

········if·(message_with_timestamp)·{

6276

········if·(message_with_timestamp)·{

6277

············struct·timeval·_now;

6277

············struct·timeval·_now;

6278

············gettimeofday(&_now,·NULL);

6278

············gettimeofday(&_now,·NULL);

6280

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_pmrswtp_readonly·"·"invalid·write·to·read·only·PMRSWTP,·ignored"·"\n",

6280

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_pmrswtp_readonly·"·"invalid·write·to·read·only·PMRSWTP,·ignored"·"\n",

6281

·····················qemu_get_thread_id(),

6281

·····················qemu_get_thread_id(),

6282

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6282

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6283

·····················);

6283

·····················);

6284

#line·6286·"trace/trace-hw_nvme.h"

6284

#line·6286·"trace/trace-hw_nvme.h"

6285

········}·else·{

6285

········}·else·{

6287

············qemu_log("pci_nvme_ub_mmiowr_pmrswtp_readonly·"·"invalid·write·to·read·only·PMRSWTP,·ignored"·"\n");

6287

············qemu_log("pci_nvme_ub_mmiowr_pmrswtp_readonly·"·"invalid·write·to·read·only·PMRSWTP,·ignored"·"\n");

6288

#line·6290·"trace/trace-hw_nvme.h"

6288

#line·6290·"trace/trace-hw_nvme.h"

6289

········}

6289

········}

6290

····}

6290

····}

6291

}

6291

}

6292

static·inline·void·trace_pci_nvme_ub_mmiowr_pmrswtp_readonly(void)

6292

static·inline·void·trace_pci_nvme_ub_mmiowr_pmrswtp_readonly(void)

6304

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_invalid(uint64_t·offset,·uint64_t·data)

6304

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiowr_invalid(uint64_t·offset,·uint64_t·data)

6305

{

6305

{

6306

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_INVALID)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6306

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIOWR_INVALID)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6307

········if·(message_with_timestamp)·{

6307

········if·(message_with_timestamp)·{

6308

············struct·timeval·_now;

6308

············struct·timeval·_now;

6309

············gettimeofday(&_now,·NULL);

6309

············gettimeofday(&_now,·NULL);

6311

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_invalid·"·"invalid·MMIO·write,·offset=0x%"PRIx64",·data=0x%"PRIx64""·"\n",

6311

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiowr_invalid·"·"invalid·MMIO·write,·offset=0x%"PRIx64",·data=0x%"PRIx64""·"\n",

6312

·····················qemu_get_thread_id(),

6312

·····················qemu_get_thread_id(),

6313

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6313

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6314

·····················,·offset,·data);

6314

·····················,·offset,·data);

6315

#line·6317·"trace/trace-hw_nvme.h"

6315

#line·6317·"trace/trace-hw_nvme.h"

6316

········}·else·{

6316

········}·else·{

6318

············qemu_log("pci_nvme_ub_mmiowr_invalid·"·"invalid·MMIO·write,·offset=0x%"PRIx64",·data=0x%"PRIx64""·"\n",·offset,·data);

6318

············qemu_log("pci_nvme_ub_mmiowr_invalid·"·"invalid·MMIO·write,·offset=0x%"PRIx64",·data=0x%"PRIx64""·"\n",·offset,·data);

6319

#line·6321·"trace/trace-hw_nvme.h"

6319

#line·6321·"trace/trace-hw_nvme.h"

6320

········}

6320

········}

6321

····}

6321

····}

6322

}

6322

}

6323

static·inline·void·trace_pci_nvme_ub_mmiowr_invalid(uint64_t·offset,·uint64_t·data)

6323

static·inline·void·trace_pci_nvme_ub_mmiowr_invalid(uint64_t·offset,·uint64_t·data)

6335

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiord_misaligned32(uint64_t·offset)

6335

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiord_misaligned32(uint64_t·offset)

6336

{

6336

{

6337

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIORD_MISALIGNED32)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6337

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIORD_MISALIGNED32)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6338

········if·(message_with_timestamp)·{

6338

········if·(message_with_timestamp)·{

6339

············struct·timeval·_now;

6339

············struct·timeval·_now;

6340

············gettimeofday(&_now,·NULL);

6340

············gettimeofday(&_now,·NULL);

6342

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiord_misaligned32·"·"MMIO·read·not·32-bit·aligned,·offset=0x%"PRIx64""·"\n",

6342

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiord_misaligned32·"·"MMIO·read·not·32-bit·aligned,·offset=0x%"PRIx64""·"\n",

6343

·····················qemu_get_thread_id(),

6343

·····················qemu_get_thread_id(),

6344

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6344

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6345

·····················,·offset);

6345

·····················,·offset);

6346

#line·6348·"trace/trace-hw_nvme.h"

6346

#line·6348·"trace/trace-hw_nvme.h"

6347

········}·else·{

6347

········}·else·{

6349

············qemu_log("pci_nvme_ub_mmiord_misaligned32·"·"MMIO·read·not·32-bit·aligned,·offset=0x%"PRIx64""·"\n",·offset);

6349

············qemu_log("pci_nvme_ub_mmiord_misaligned32·"·"MMIO·read·not·32-bit·aligned,·offset=0x%"PRIx64""·"\n",·offset);

6350

#line·6352·"trace/trace-hw_nvme.h"

6350

#line·6352·"trace/trace-hw_nvme.h"

6351

········}

6351

········}

6352

····}

6352

····}

6353

}

6353

}

6354

static·inline·void·trace_pci_nvme_ub_mmiord_misaligned32(uint64_t·offset)

6354

static·inline·void·trace_pci_nvme_ub_mmiord_misaligned32(uint64_t·offset)

6366

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiord_toosmall(uint64_t·offset)

6366

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiord_toosmall(uint64_t·offset)

6367

{

6367

{

6368

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIORD_TOOSMALL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6368

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIORD_TOOSMALL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6369

········if·(message_with_timestamp)·{

6369

········if·(message_with_timestamp)·{

6370

············struct·timeval·_now;

6370

············struct·timeval·_now;

6371

············gettimeofday(&_now,·NULL);

6371

············gettimeofday(&_now,·NULL);

6373

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiord_toosmall·"·"MMIO·read·smaller·than·32-bits,·offset=0x%"PRIx64""·"\n",

6373

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiord_toosmall·"·"MMIO·read·smaller·than·32-bits,·offset=0x%"PRIx64""·"\n",

6374

·····················qemu_get_thread_id(),

6374

·····················qemu_get_thread_id(),

6375

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6375

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6376

·····················,·offset);

6376

·····················,·offset);

6377

#line·6379·"trace/trace-hw_nvme.h"

6377

#line·6379·"trace/trace-hw_nvme.h"

6378

········}·else·{

6378

········}·else·{

6380

············qemu_log("pci_nvme_ub_mmiord_toosmall·"·"MMIO·read·smaller·than·32-bits,·offset=0x%"PRIx64""·"\n",·offset);

6380

············qemu_log("pci_nvme_ub_mmiord_toosmall·"·"MMIO·read·smaller·than·32-bits,·offset=0x%"PRIx64""·"\n",·offset);

6381

#line·6383·"trace/trace-hw_nvme.h"

6381

#line·6383·"trace/trace-hw_nvme.h"

6382

········}

6382

········}

6383

····}

6383

····}

6384

}

6384

}

6385

static·inline·void·trace_pci_nvme_ub_mmiord_toosmall(uint64_t·offset)

6385

static·inline·void·trace_pci_nvme_ub_mmiord_toosmall(uint64_t·offset)

6397

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiord_invalid_ofs(uint64_t·offset)

6397

static·inline·void·_nocheck__trace_pci_nvme_ub_mmiord_invalid_ofs(uint64_t·offset)

6398

{

6398

{

6399

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIORD_INVALID_OFS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6399

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_MMIORD_INVALID_OFS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6400

········if·(message_with_timestamp)·{

6400

········if·(message_with_timestamp)·{

6401

············struct·timeval·_now;

6401

············struct·timeval·_now;

6402

············gettimeofday(&_now,·NULL);

6402

············gettimeofday(&_now,·NULL);

6404

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiord_invalid_ofs·"·"MMIO·read·beyond·last·register,·offset=0x%"PRIx64",·returning·0"·"\n",

6404

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_mmiord_invalid_ofs·"·"MMIO·read·beyond·last·register,·offset=0x%"PRIx64",·returning·0"·"\n",

6405

·····················qemu_get_thread_id(),

6405

·····················qemu_get_thread_id(),

6406

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6406

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6407

·····················,·offset);

6407

·····················,·offset);

6408

#line·6410·"trace/trace-hw_nvme.h"

6408

#line·6410·"trace/trace-hw_nvme.h"

6409

········}·else·{

6409

········}·else·{

6411

············qemu_log("pci_nvme_ub_mmiord_invalid_ofs·"·"MMIO·read·beyond·last·register,·offset=0x%"PRIx64",·returning·0"·"\n",·offset);

6411

············qemu_log("pci_nvme_ub_mmiord_invalid_ofs·"·"MMIO·read·beyond·last·register,·offset=0x%"PRIx64",·returning·0"·"\n",·offset);

6412

#line·6414·"trace/trace-hw_nvme.h"

6412

#line·6414·"trace/trace-hw_nvme.h"

6413

········}

6413

········}

6414

····}

6414

····}

6415

}

6415

}

6416

static·inline·void·trace_pci_nvme_ub_mmiord_invalid_ofs(uint64_t·offset)

6416

static·inline·void·trace_pci_nvme_ub_mmiord_invalid_ofs(uint64_t·offset)

6428

static·inline·void·_nocheck__trace_pci_nvme_ub_db_wr_misaligned(uint64_t·offset)

6428

static·inline·void·_nocheck__trace_pci_nvme_ub_db_wr_misaligned(uint64_t·offset)

6429

{

6429

{

6430

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_DB_WR_MISALIGNED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6430

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_DB_WR_MISALIGNED)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6431

········if·(message_with_timestamp)·{

6431

········if·(message_with_timestamp)·{

6432

············struct·timeval·_now;

6432

············struct·timeval·_now;

6433

············gettimeofday(&_now,·NULL);

6433

············gettimeofday(&_now,·NULL);

6435

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_db_wr_misaligned·"·"doorbell·write·not·32-bit·aligned,·offset=0x%"PRIx64",·ignoring"·"\n",

6435

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_db_wr_misaligned·"·"doorbell·write·not·32-bit·aligned,·offset=0x%"PRIx64",·ignoring"·"\n",

6436

·····················qemu_get_thread_id(),

6436

·····················qemu_get_thread_id(),

6437

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6437

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6438

·····················,·offset);

6438

·····················,·offset);

6439

#line·6441·"trace/trace-hw_nvme.h"

6439

#line·6441·"trace/trace-hw_nvme.h"

6440

········}·else·{

6440

········}·else·{

6442

············qemu_log("pci_nvme_ub_db_wr_misaligned·"·"doorbell·write·not·32-bit·aligned,·offset=0x%"PRIx64",·ignoring"·"\n",·offset);

6442

············qemu_log("pci_nvme_ub_db_wr_misaligned·"·"doorbell·write·not·32-bit·aligned,·offset=0x%"PRIx64",·ignoring"·"\n",·offset);

6443

#line·6445·"trace/trace-hw_nvme.h"

6443

#line·6445·"trace/trace-hw_nvme.h"

6444

········}

6444

········}

6445

····}

6445

····}

6446

}

6446

}

6447

static·inline·void·trace_pci_nvme_ub_db_wr_misaligned(uint64_t·offset)

6447

static·inline·void·trace_pci_nvme_ub_db_wr_misaligned(uint64_t·offset)

6459

static·inline·void·_nocheck__trace_pci_nvme_ub_db_wr_invalid_cq(uint32_t·qid)

6459

static·inline·void·_nocheck__trace_pci_nvme_ub_db_wr_invalid_cq(uint32_t·qid)

6460

{

6460

{

6461

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_DB_WR_INVALID_CQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6461

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_DB_WR_INVALID_CQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6462

········if·(message_with_timestamp)·{

6462

········if·(message_with_timestamp)·{

6463

············struct·timeval·_now;

6463

············struct·timeval·_now;

6464

············gettimeofday(&_now,·NULL);

6464

············gettimeofday(&_now,·NULL);

6466

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_db_wr_invalid_cq·"·"completion·queue·doorbell·write·for·nonexistent·queue,·cqid=%"PRIu32",·ignoring"·"\n",

6466

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_db_wr_invalid_cq·"·"completion·queue·doorbell·write·for·nonexistent·queue,·cqid=%"PRIu32",·ignoring"·"\n",

6467

·····················qemu_get_thread_id(),

6467

·····················qemu_get_thread_id(),

6468

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6468

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6469

·····················,·qid);

6469

·····················,·qid);

6470

#line·6472·"trace/trace-hw_nvme.h"

6470

#line·6472·"trace/trace-hw_nvme.h"

6471

········}·else·{

6471

········}·else·{

6473

············qemu_log("pci_nvme_ub_db_wr_invalid_cq·"·"completion·queue·doorbell·write·for·nonexistent·queue,·cqid=%"PRIu32",·ignoring"·"\n",·qid);

6473

············qemu_log("pci_nvme_ub_db_wr_invalid_cq·"·"completion·queue·doorbell·write·for·nonexistent·queue,·cqid=%"PRIu32",·ignoring"·"\n",·qid);

6474

#line·6476·"trace/trace-hw_nvme.h"

6474

#line·6476·"trace/trace-hw_nvme.h"

6475

········}

6475

········}

6476

····}

6476

····}

6477

}

6477

}

6478

static·inline·void·trace_pci_nvme_ub_db_wr_invalid_cq(uint32_t·qid)

6478

static·inline·void·trace_pci_nvme_ub_db_wr_invalid_cq(uint32_t·qid)

6490

static·inline·void·_nocheck__trace_pci_nvme_ub_db_wr_invalid_cqhead(uint32_t·qid,·uint16_t·new_head)

6490

static·inline·void·_nocheck__trace_pci_nvme_ub_db_wr_invalid_cqhead(uint32_t·qid,·uint16_t·new_head)

6491

{

6491

{

6492

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_DB_WR_INVALID_CQHEAD)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6492

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_DB_WR_INVALID_CQHEAD)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6493

········if·(message_with_timestamp)·{

6493

········if·(message_with_timestamp)·{

6494

············struct·timeval·_now;

6494

············struct·timeval·_now;

6495

············gettimeofday(&_now,·NULL);

6495

············gettimeofday(&_now,·NULL);

6497

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_db_wr_invalid_cqhead·"·"completion·queue·doorbell·write·value·beyond·queue·size,·cqid=%"PRIu32",·new_head=%"PRIu16",·ignoring"·"\n",

6497

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_db_wr_invalid_cqhead·"·"completion·queue·doorbell·write·value·beyond·queue·size,·cqid=%"PRIu32",·new_head=%"PRIu16",·ignoring"·"\n",

6498

·····················qemu_get_thread_id(),

6498

·····················qemu_get_thread_id(),

6499

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6499

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6500

·····················,·qid,·new_head);

6500

·····················,·qid,·new_head);

6501

#line·6503·"trace/trace-hw_nvme.h"

6501

#line·6503·"trace/trace-hw_nvme.h"

6502

········}·else·{

6502

········}·else·{

6504

············qemu_log("pci_nvme_ub_db_wr_invalid_cqhead·"·"completion·queue·doorbell·write·value·beyond·queue·size,·cqid=%"PRIu32",·new_head=%"PRIu16",·ignoring"·"\n",·qid,·new_head);

6504

············qemu_log("pci_nvme_ub_db_wr_invalid_cqhead·"·"completion·queue·doorbell·write·value·beyond·queue·size,·cqid=%"PRIu32",·new_head=%"PRIu16",·ignoring"·"\n",·qid,·new_head);

6505

#line·6507·"trace/trace-hw_nvme.h"

6505

#line·6507·"trace/trace-hw_nvme.h"

6506

········}

6506

········}

6507

····}

6507

····}

6508

}

6508

}

6509

static·inline·void·trace_pci_nvme_ub_db_wr_invalid_cqhead(uint32_t·qid,·uint16_t·new_head)

6509

static·inline·void·trace_pci_nvme_ub_db_wr_invalid_cqhead(uint32_t·qid,·uint16_t·new_head)

6521

static·inline·void·_nocheck__trace_pci_nvme_ub_db_wr_invalid_sq(uint32_t·qid)

6521

static·inline·void·_nocheck__trace_pci_nvme_ub_db_wr_invalid_sq(uint32_t·qid)

6522

{

6522

{

6523

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_DB_WR_INVALID_SQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6523

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_DB_WR_INVALID_SQ)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6524

········if·(message_with_timestamp)·{

6524

········if·(message_with_timestamp)·{

6525

············struct·timeval·_now;

6525

············struct·timeval·_now;

6526

············gettimeofday(&_now,·NULL);

6526

············gettimeofday(&_now,·NULL);

6528

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_db_wr_invalid_sq·"·"submission·queue·doorbell·write·for·nonexistent·queue,·sqid=%"PRIu32",·ignoring"·"\n",

6528

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_db_wr_invalid_sq·"·"submission·queue·doorbell·write·for·nonexistent·queue,·sqid=%"PRIu32",·ignoring"·"\n",

6529

·····················qemu_get_thread_id(),

6529

·····················qemu_get_thread_id(),

6530

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6530

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6531

·····················,·qid);

6531

·····················,·qid);

6532

#line·6534·"trace/trace-hw_nvme.h"

6532

#line·6534·"trace/trace-hw_nvme.h"

6533

········}·else·{

6533

········}·else·{

6535

············qemu_log("pci_nvme_ub_db_wr_invalid_sq·"·"submission·queue·doorbell·write·for·nonexistent·queue,·sqid=%"PRIu32",·ignoring"·"\n",·qid);

6535

············qemu_log("pci_nvme_ub_db_wr_invalid_sq·"·"submission·queue·doorbell·write·for·nonexistent·queue,·sqid=%"PRIu32",·ignoring"·"\n",·qid);

6536

#line·6538·"trace/trace-hw_nvme.h"

6536

#line·6538·"trace/trace-hw_nvme.h"

6537

········}

6537

········}

6538

····}

6538

····}

6539

}

6539

}

6540

static·inline·void·trace_pci_nvme_ub_db_wr_invalid_sq(uint32_t·qid)

6540

static·inline·void·trace_pci_nvme_ub_db_wr_invalid_sq(uint32_t·qid)

6552

static·inline·void·_nocheck__trace_pci_nvme_ub_db_wr_invalid_sqtail(uint32_t·qid,·uint16_t·new_tail)

6552

static·inline·void·_nocheck__trace_pci_nvme_ub_db_wr_invalid_sqtail(uint32_t·qid,·uint16_t·new_tail)

6553

{

6553

{

6554

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_DB_WR_INVALID_SQTAIL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6554

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_DB_WR_INVALID_SQTAIL)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6555

········if·(message_with_timestamp)·{

6555

········if·(message_with_timestamp)·{

6556

············struct·timeval·_now;

6556

············struct·timeval·_now;

6557

············gettimeofday(&_now,·NULL);

6557

············gettimeofday(&_now,·NULL);

6559

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_db_wr_invalid_sqtail·"·"submission·queue·doorbell·write·value·beyond·queue·size,·sqid=%"PRIu32",·new_head=%"PRIu16",·ignoring"·"\n",

6559

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_db_wr_invalid_sqtail·"·"submission·queue·doorbell·write·value·beyond·queue·size,·sqid=%"PRIu32",·new_head=%"PRIu16",·ignoring"·"\n",

6560

·····················qemu_get_thread_id(),

6560

·····················qemu_get_thread_id(),

6561

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6561

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6562

·····················,·qid,·new_tail);

6562

·····················,·qid,·new_tail);

6563

#line·6565·"trace/trace-hw_nvme.h"

6563

#line·6565·"trace/trace-hw_nvme.h"

6564

········}·else·{

6564

········}·else·{

6566

············qemu_log("pci_nvme_ub_db_wr_invalid_sqtail·"·"submission·queue·doorbell·write·value·beyond·queue·size,·sqid=%"PRIu32",·new_head=%"PRIu16",·ignoring"·"\n",·qid,·new_tail);

6566

············qemu_log("pci_nvme_ub_db_wr_invalid_sqtail·"·"submission·queue·doorbell·write·value·beyond·queue·size,·sqid=%"PRIu32",·new_head=%"PRIu16",·ignoring"·"\n",·qid,·new_tail);

6567

#line·6569·"trace/trace-hw_nvme.h"

6567

#line·6569·"trace/trace-hw_nvme.h"

6568

········}

6568

········}

6569

····}

6569

····}

6570

}

6570

}

6571

static·inline·void·trace_pci_nvme_ub_db_wr_invalid_sqtail(uint32_t·qid,·uint16_t·new_tail)

6571

static·inline·void·trace_pci_nvme_ub_db_wr_invalid_sqtail(uint32_t·qid,·uint16_t·new_tail)

6583

static·inline·void·_nocheck__trace_pci_nvme_ub_unknown_css_value(void)

6583

static·inline·void·_nocheck__trace_pci_nvme_ub_unknown_css_value(void)

6584

{

6584

{

6585

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_UNKNOWN_CSS_VALUE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6585

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_UNKNOWN_CSS_VALUE)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6586

········if·(message_with_timestamp)·{

6586

········if·(message_with_timestamp)·{

6587

············struct·timeval·_now;

6587

············struct·timeval·_now;

6588

············gettimeofday(&_now,·NULL);

6588

············gettimeofday(&_now,·NULL);

6590

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_unknown_css_value·"·"unknown·value·in·cc.css·field"·"\n",

6590

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_unknown_css_value·"·"unknown·value·in·cc.css·field"·"\n",

6591

·····················qemu_get_thread_id(),

6591

·····················qemu_get_thread_id(),

6592

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6592

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6593

·····················);

6593

·····················);

6594

#line·6596·"trace/trace-hw_nvme.h"

6594

#line·6596·"trace/trace-hw_nvme.h"

6595

········}·else·{

6595

········}·else·{

6597

············qemu_log("pci_nvme_ub_unknown_css_value·"·"unknown·value·in·cc.css·field"·"\n");

6597

············qemu_log("pci_nvme_ub_unknown_css_value·"·"unknown·value·in·cc.css·field"·"\n");

6598

#line·6600·"trace/trace-hw_nvme.h"

6598

#line·6600·"trace/trace-hw_nvme.h"

6599

········}

6599

········}

6600

····}

6600

····}

6601

}

6601

}

6602

static·inline·void·trace_pci_nvme_ub_unknown_css_value(void)

6602

static·inline·void·trace_pci_nvme_ub_unknown_css_value(void)

6614

static·inline·void·_nocheck__trace_pci_nvme_ub_too_many_mappings(void)

6614

static·inline·void·_nocheck__trace_pci_nvme_ub_too_many_mappings(void)

6615

{

6615

{

6616

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_TOO_MANY_MAPPINGS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6616

····if·(trace_event_get_state(TRACE_PCI_NVME_UB_TOO_MANY_MAPPINGS)·&&·qemu_loglevel_mask(LOG_TRACE))·{

6617

········if·(message_with_timestamp)·{

6617

········if·(message_with_timestamp)·{

6618

············struct·timeval·_now;

6618

············struct·timeval·_now;

6619

············gettimeofday(&_now,·NULL);

6619

············gettimeofday(&_now,·NULL);

6621

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_too_many_mappings·"·"too·many·prp/sgl·mappings"·"\n",

6621

············qemu_log("%d@%zu.%06zu:pci_nvme_ub_too_many_mappings·"·"too·many·prp/sgl·mappings"·"\n",

6622

·····················qemu_get_thread_id(),

6622

·····················qemu_get_thread_id(),

6623

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6623

·····················(size_t)_now.tv_sec,·(size_t)_now.tv_usec

6624

·····················);

6624

·····················);

6625

#line·6627·"trace/trace-hw_nvme.h"

6625

#line·6627·"trace/trace-hw_nvme.h"

6626

········}·else·{

6626

········}·else·{

6628

············qemu_log("pci_nvme_ub_too_many_mappings·"·"too·many·prp/sgl·mappings"·"\n");

6628

············qemu_log("pci_nvme_ub_too_many_mappings·"·"too·many·prp/sgl·mappings"·"\n");

6629

#line·6631·"trace/trace-hw_nvme.h"

6629

#line·6631·"trace/trace-hw_nvme.h"

6630

········}

6630

········}

6631

····}

6631

····}

6632

}

6632

}

6633

static·inline·void·trace_pci_nvme_ub_too_many_mappings(void)

6633

static·inline·void·trace_pci_nvme_ub_too_many_mappings(void)